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[USER=688381]@Henry98[/USER] , you are getting a quite weird result...

1. Did you make sure that you have only 1 clock source in the circuit (and it has the highest frequency) and the rest are just derivatives of it?

2. Did you try to run transient analysis to make sure that you are getting an output signal which is close to what you are expecting? Apart from simulation settings, I am suspecting some errors in your schematic, so maybe that's why you are getting -6kdB (!) as a result.

3. It would be useful to see your schematic by the way...