Jul 19, 2012 #1 H hannover90 Member level 4 Joined Dec 8, 2009 Messages 70 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Location Germany Activity points 1,784 Hello, I want to build a ideal circuit by cadence, which the voltage Ux is defined by dc analyse as following: 1. for Uin<1V -------> Ux have to be Uin+2V. 2. for Uin>=1V -------> Ux have to be 3V Which ideal component in Cadence can I use to define Ux? I would be thankful for your reply. Best regards Sarah
Hello, I want to build a ideal circuit by cadence, which the voltage Ux is defined by dc analyse as following: 1. for Uin<1V -------> Ux have to be Uin+2V. 2. for Uin>=1V -------> Ux have to be 3V Which ideal component in Cadence can I use to define Ux? I would be thankful for your reply. Best regards Sarah
Jul 19, 2012 #2 C CCommander Newbie level 4 Joined Jul 19, 2012 Messages 6 Helped 2 Reputation 4 Reaction score 2 Trophy points 1,283 Activity points 1,311 This would be very easy to do with VerilogA. - - - Updated - - - `include "constants.vams" `include "disciplines.vams" module YOURMODULENAME(in, x); input in; output x; electrical in, x; analog begin if( V(in) < 1) V(x) <+ V(in) + 2; else if(V(in) >= 1) V(x) <+ 3; end endmodule
This would be very easy to do with VerilogA. - - - Updated - - - `include "constants.vams" `include "disciplines.vams" module YOURMODULENAME(in, x); input in; output x; electrical in, x; analog begin if( V(in) < 1) V(x) <+ V(in) + 2; else if(V(in) >= 1) V(x) <+ 3; end endmodule
Jul 19, 2012 #3 H hannover90 Member level 4 Joined Dec 8, 2009 Messages 70 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Location Germany Activity points 1,784 Hello, thank you very much for your reply. I have done it and wanted to create it symbol (Library Manager -- file/new/cell view), but it is emty. Do you know how can I create its symbol for cadence schematic? thnaks again, Sarah
Hello, thank you very much for your reply. I have done it and wanted to create it symbol (Library Manager -- file/new/cell view), but it is emty. Do you know how can I create its symbol for cadence schematic? thnaks again, Sarah
Jul 19, 2012 #4 C CCommander Newbie level 4 Joined Jul 19, 2012 Messages 6 Helped 2 Reputation 4 Reaction score 2 Trophy points 1,283 Activity points 1,311 You have to create the verilog file first. file-> new -> cell view then choose verilogA paste the code save and close If there are no errors cadence will tell you that there is no symbol yet and asks you if you want to create it automatically.
You have to create the verilog file first. file-> new -> cell view then choose verilogA paste the code save and close If there are no errors cadence will tell you that there is no symbol yet and asks you if you want to create it automatically.
Jul 19, 2012 #5 O osvi Newbie level 5 Joined Jul 19, 2012 Messages 8 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,291 Location Sicily,Italy Activity points 1,320 hannover90 said: Hello, thank you very much for your reply. I have done it and wanted to create it symbol (Library Manager -- file/new/cell view), but it is emty. Do you know how can I create its symbol for cadence schematic? thnaks again, Sarah Click to expand... hi Sarah,i m a Italian student. I am making a schematic of a OTA for a my final exam .....can you help me please? - - - Updated - - - Hi Sarah,i m a italian student.I am making a schematic with cadence for my final exame.Can you hepl me?
hannover90 said: Hello, thank you very much for your reply. I have done it and wanted to create it symbol (Library Manager -- file/new/cell view), but it is emty. Do you know how can I create its symbol for cadence schematic? thnaks again, Sarah Click to expand... hi Sarah,i m a Italian student. I am making a schematic of a OTA for a my final exam .....can you help me please? - - - Updated - - - Hi Sarah,i m a italian student.I am making a schematic with cadence for my final exame.Can you hepl me?