cdic
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what linux is used for ic design
Schematic Capture: Design-Archtecture
HDL Entry: Summit, HDL Designer Series
HDL analyzer: debussy
RTL Simulation: LDV, VCS, Modelsim
Synthesis: Design-Compiler
STA: Prime Time
ATPG: Tetra-Max
Transitor Level Simulation: Hspice
Analyzer(Full chip): Hsim, Math TA
P&R: Magma
Layout editor: IC-Station, Panda2000
Layout Verification: Calibre, Panda2000
Extraction: xCalibre
Schematic Capture: Design-Archtecture
HDL Entry: Summit, HDL Designer Series
HDL analyzer: debussy
RTL Simulation: LDV, VCS, Modelsim
Synthesis: Design-Compiler
STA: Prime Time
ATPG: Tetra-Max
Transitor Level Simulation: Hspice
Analyzer(Full chip): Hsim, Math TA
P&R: Magma
Layout editor: IC-Station, Panda2000
Layout Verification: Calibre, Panda2000
Extraction: xCalibre