Rajnaveen
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May i see your schematic ? how is your IR2110 configuration ? how much is value of your bootstrap capacitor ? how much is your PWm frequency how much is your modulation depth and what kind of mosfet you have used ?hi friends ,
I am using 2110 ic as a pwm for inverter mosfet , there is a problem that when initially input pwm is provided ic provide output after 150us what causes this problem and in this time i saw that bootstrap capacitor suddenly decrase the voltage level of dc supply for ic after few ms ic working is normal ..
what is solution...help ...me
Use 100 uF instead of 22uF .I dont have the schematic right now but i can tell you detail ..Capacitor value is .1uf and 22uf in parallel .
I mean your minimum and maximum value of duty cycle .and Will you please explain me what is modulation depth ?
how much is value of your bootstrap capacitor ?
Capacitor value is .1uf and 22uf in parallel .
Use 100 uF instead of 22uF
are this the really values of bootstrap capacitor?
This is way too much. 0.1uF up to 1uF ceramics is good.
Klaus
This is true, but how "long time" is it for a 20kHz PWM frequency?1uf or 0.1uf can't maintain charge for a long time
The IR2110 has undervoltage protection, so there is no danger to turn into linear region.if use it with a low capacity then your H side will turn into linear region
HiThis is true, but how "long time" is it for a 20kHz PWM frequency?
Sorry but i think must learn about how a mosfet driver does work ! 100% D.C ?!! in that case how the bootstrap action would be fulfilled ? of course it won't do it's job ! furthermore the first post says it's for inverter okay ? in what kind of inverter you see the D.C about 100 percent ??!!It´s better to reccomend not to use 100% duty cycle.
And in that case the circuit won't work as well as expected because it will stop switching isn't it ?The IR2110 has undervoltage protection, so there is no danger to turn into linear region.
Hi
Be careful of the phrases which you're using ! i suppose when you joined here you read the laws isn't it ? so watch your step .Well roared, lion.
If you are familiar with bootstrap action why you talked about 100 percent D.C which is impossible for a bootstrap driver ?! indeed you need to learn !All the information you are talking about can be found in the reccomended documents. ( even the calculations of the bootstrap Cs including leakage and frequency)
And i have the experience to say, that if one keeps on this information all will be good.
A simple thing : don't follow every thing blindly an example ? refer to the datasheet of UC3845 you'll see a diagram which presents how to use RTCT in order to make the frequency in your desired range . you know the result ? the result is that in datasheets which i've got those years which i guess they didn't improve it yet , that is all wrong ! if you go though it you'll see the frequency is two time less .Let the people teach themselfes. With reliable informations from manufacturers with huge experience.
And neither meSo, don't be upset, this was not my intention.
i´m sorry. i didn´t know that it´s not allowed to quote Shakespeare...you read the laws isn't it ? so watch your step .
As i recommended not to use 100% duty cycle...indeed you need to learn !
I make mistakes, you make mistakes, everyone makes mistakes. And therefore it is not unusual that there are mistakes in datasheets.refer to the datasheet of UC3845
I never intended to fight against you, but to give the OP helpful assistance.is why humans should fight..
I really didn't know that , that sentence is for Shakespeare so no problem with that ;-)i´m sorry. i didn´t know that it´s not allowed to quote Shakespeare.
I know about these calculations but my meaning was not just leakage . gate current is important too . and a lot of parameters . i agree the calculated cap may be low but as FvM said (case2) i was referring to such a issue but i couldn't transfer my meaning as well .As i recommended not to use 100% duty cycle...
1) i knew it is an often made mistake with bootstrapping, (often occasionally, when one builds a regulation loop and it´s (clipped/saturated) output leads to 100% duty cycle)
2) it shows that i´ve already learned this...
Would you also complain if i recommend not to touch a 10kV wire?
The 100% duty cycle came into my mind, because with 20kHz the bootstrap gets charged every 50us.
For me this is not a long time. Now you speak of "long time". So i looked for a case where with a 20 kHz PWM the time between two charge cycles is more than 50us.
My conclusion was that only 100% duty cycle can generate this situation. (i know 100% duty cycle isn´t truely a PWM).
An objective way for informations are calculations:
I estimate time to it´s worst case with 20kHz: 50us
I use a 1uF capacitor
And i estimate the leakage current to be 100uA. (also about worst case)
C = I * t / dU ==> dU = I * t / C = 100uA * 50us / 1uF = 5mV.
Maybe i´m wrong, but 5mV of voltage drop caused by leakage current under worst case conditions isn´t much.
Certainly ! nobody is complete human means a lot of mistakes while growing process .make mistakes, you make mistakes, everyone makes mistakes. And therefore it is not unusual that there are mistakes in datasheets.
I agree that we must shake hands and be friendly . sorry if my words were not good . :-DSo let´s shake hands.
With honest regards
I highly believe in this issue ! almost all of my similar problems with bootstrap drivers were related to the bootstrap capacitor too .case 2: You have 20 kHz PWM with periodical gaps caused by overmodulation or dedicated modulation methods like "flat top". The bootstrap capacitor must additionally store the charge for DC-current*gap length. A high µF value may be required.
For lack of detailed results (e.g. oscilloscope waveforms), it hasn't been clarified that the original "150 µs delay" problem is related to bootstrap capacitor size at all.
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