IBM O18 CMOS decoupling capacitor

[angyp]

cmos decoupling capacitors

does anyone familiar with the capacitor model name PCDCAP? The PCDCAP is recommended for decoupling capacitor.

To assure that decoupling capacitors have a negligible effect on reliability and yield, it is recommended that:
1. Total Active Area with decoupling capacitors / Total active area without decoupling capacitors <1.02 .
2.If the design requires more decoupling capacitors the failure rate will scale approximately with the ratio given above. For example, if design has 100,000 um2 of total active area, and 10,000 um2 of this total consists of decoupling capacitors, the failure rate will be approximately 100,000 / 90,000 = 11% higher than if no decoupling capacitors were present in the design.

if i were to follow this rule i can only put a 20pF decoupling capacitor in the chip. for my design i need 200pF.
do i really have to follow the reliability rule to reduce the impact of reliability fails?

 

[selvaraja]

cmos capacitor

An offset violation from the yield and realibility coefficient of the PCDCAP would result in a direct short of Vdd and GND, which is highly not desirable. In the highlighted issue the offset is +0.09.

Rgds

 

[angyp]

cmos decoupling

what do you mean by an offset of 0.09. what i can do if i really need to put a 200pF capacitor as a decoupling capacitor inside the chip?

 

[uncle_urfi]

25u capacitor

I don't know much about IBM's technology, but a 200pF onchip capacitor can be implemented as an array of unit fractal capacitors. (sounds like the anti-thesis of the fractal theory, when i say 'unit')

A 1 pF fractal capacitor in TSMC CMOS 0.18 would be around 25u * 25u in 5 layers.

Since you are simply providing decoupling, this can be filled in all nooks and crannies and the offset wouldn't have an impact on it.

 

[take_care00]

pcdcap

Hi uncle_urfi,

Do you have any paper about fractal capacitance that you could forward to me?

Regarding the upper limit in decoupling capacitance are ratio, IBM doesn sign off the project if you violate their rule.

Take care.

 

[raymond_luo2003]

fractal capacitors

Firstly, you'd better follow the reliability rule. But I am wondering why you have only one choice to use this so call "PCDCAP", sorry about I have no experience on IBM process. In general TSMC/UMC, you can use MOS cap/ MIM cap/PIP cap or fractal cap. Your capacitance is not very big, so you can easily get 200PF by above components.


Raymond