I2C Radio tuner problem

[unseen]

i2c radio

Hi!
I got from a car radio, a TEA6820T+TEA6811 based stereo tuner.
https://www.alldatasheet.com/datashee.../TEA6820T.html
https://www.alldatasheet.com/datashee...S/TEA6811.html
For testing im using the parallel port in EPP mode. I made some software I2C routins, which I use for sending data according to datasheets, and it worked very well from start. However I spent almost 2 days trying to receive data from the IF IC (TEA6820) without any success. Im using a 74LS244 tri-state bus driver, checked the hardware separately and works fine.
By applying a slow clock rate, I can debug the whole reading process, and realized, that the IF IC does not react at all, the SDA line remains high all the time.

Function ReadDATA: Byte;
var
i,j : byte;
begin
x:=0;
DlPortWritePortUchar(LPT_Port,2); //Read buffer enable
For i := 0 to 7 do
begin
  DlPortWritePortUchar(LPT_Port+2,4);//Sleep(0); SCL High
  j:=(DlPortReadPortUchar(LPT_Port+1) AND $20);
  if j>0 then j:=1 else j:=0;
  x:=(x SHL 1) OR j;
  DlPortWritePortUchar(LPT_Port+2,0);//Sleep(0); SCL Low
end;
//DlPortWritePortUchar(LPT_Port+2,0);Sleep(0); //SCL low for ACK/WRITE
DlPortWritePortUchar(LPT_Port,4+1);Sleep(0); //SDA high for NACK/WRITE
 SCL; //Ack

result := x;
end;

Start;
 WriteDATA($C3); //TEA6820T read address
 ReadDATA;
Stop;

For now I'm only interested in first byte, particularily the level information for auto scan.

I would also highly appreciate, if somebody could explain the method of calculating the division ratios for the AM part.
The first thing that doesn't fits is the 1KHz step, (TEA6811 datasheet, page 12) since the IF IC can only deliver a minimum of 3KHz reference frequency.
We got a 10.7MHz AM IF from the front-end IC. I am totally confused on how to calculate the division ratios. (for N2=3 or 5,(any reference) I got nothing trough the whole tuning range, for 10 an 15 it worked with div rates around 55-60000)
(an example for FM: receive freq=100MHZ; reference=3KHz [100000+72200(FM IF)]/3 = 57400
Thank you!

 

[FvM]

tuner i2c prog

I'm basically no sure if you drive SDA correct with the three-state driver. The circuit could only be guessed from the code. But the negative result suggests you aren't operating the I2C correct.

 

[unseen]

dlportwriteportuchar scl

Writing the chip works perfectly, I am able to tune the whole FM range without any problems. I attached the schematic for SDA. I've also tried with a 10K pullup resistor, but still nothing.

 

[FvM]

ic radio tuner i²c

If the shown circuit is complete (for SDA), the problem is most likely caused by missing pullup resistor. Basically both I2C lines are operated open drain, not push-pull. For SCL, push-pull operation can be used as long as no I2C slave is utilizing clock stretch technique. But SDA always needs a pullup (e. g. 1-5K) and the driver should be open drain. Only I2C fast mode (very rarely used) has push-pull drivers. See:


This means, that the SDA three-state driver could be operated through nEnable input only with the input connected to GND, it isn't required to drive SDA active high.

Added after 25 minutes:

Regarding AM tuning, you should notice the frequency divider utilized in AM mode. As the VCO range is 117-207 MHz, a divider is necessary to achieve 10.7 MHz first IF for AM bands. The minimum divider ratio is 3, so you get 1 kHz tuning step with 3 kHz reference frequency.

 

[unseen]

radio i2c down

Thank You for helping!
I think I understand most of it now, but still have some unclear areas.
As I said earlier, for 3 and 5 divider values (N2) I got nothing troughout the whole tuning range.
Conform to datasheet, the AM ranges from 510KHz to 1710KHz.
Lets presume that I'm receiving at 510KHz. First IF=VCO-Fin. This means that VCO should be 510+10700=11210.
Since VCO ranges from 116.8-207MHz, the smallest divide value for N2 must be 10.
So 10x11210=112.1MHz (If VCO cant go down this low, probably a 15 division will be nececary for receiving 510KHz?)
Now if I'm using 3KHz reference, means that I get 3000/15=200Hz minimum step size?
As for the programmable divider, (with 15 for N2) we got:
510+10700=11210
11.210x15=168.150 = VCO
168.150/3=56050 = prog divider.
These values match my measurements Ive written in first post.
Am I wrong, or why is totally against datasheet?

Regarding I2C, I know I should use open drain outputs, but as I mentiond, the writing works well. I can tune the whole FM band without problems.
I have troubles reading the chip. I switch the output driver to 3state, and activate the input buffer. Im not driving SDA, the chip would have to do it, but it remains high all the time during the read process. I only apply clock.
Dont know if uses clock stretch, but i gave long time enough while debugging, around 2-3s after each clock change, so that should not be a problem?

 

[FvM]

i2c radio chip

DlPortWritePortUchar(LPT_Port,4+1);

is an example of driving SDA high, to my opinion. That must not be an issue in this case, but I would generally avoid it. It also isn't impossible to damage the peer SDA driver this way.

Another guess would be, that your reading the output too fast respectively have a too weak pull-up resistor. However, if SDA stays high during read, either the chip didn't understand the read command due to previous error, or the driver is actually damaged.

I'm not sure, if it is possible to operate the I2C with seconds delays. Some I2C chips had utilized timeouts, if I remember right. But it should be stated in datasheet then.

 

[unseen]

i2c+radio

I'm not sure, if it is possible to operate the I2C with seconds delays

I actually tested before, on setting up the chip, and it is working.

I have found the problem for reading the chip. The I2C communication was too fast.

The AM part is still not clear
For example a divider value of 53502 would give an input frequency of 0Hz.
53502*3KHz=160506KHz VCO -> 160506KHz/15=10700KHz -> the output of mixer1 needs to be the same, 10.7MHz
And I still receive much below of that. (47780)
Thank You again!