I2C Interrupt generation problem ARM LPC2468

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#include <nxp/iolpc2468.h>
#include "i2c.h"
 
#include <intrinsics.h>
 
int main(void)
 
{
   
  /*MEMMAP  = 0x2;*/ 
  IO0DIR  |= 0xF0;   
  
  i2cReset();
  
  I2C0CONSET = 0x60;
     
    while(1)
    {
      I2C0CONCLR = 0x40;   /* clear flags */
      I2C0CONSET = 0x40; /* enable master functions */
    }
}
 
 
/*****************************************************
 * i2c.h: I2C Header file code to test the functionality 
 *
******************************************************/
 
#ifndef _I2C_H
#define _I2C_H
 
#ifndef NULL
#define NULL (0)
#endif
 
#define FALSE 0
#define TRUE  1
 
typedef unsigned char tU8;
typedef unsigned short tU16;
typedef unsigned int tU32;
typedef signed char tS8;
typedef signed short tS16;
typedef signed int tS32;
typedef unsigned char tBool;
 
/******************************************************************************
 * Defines, macros, and typedefs
 *****************************************************************************/
 
/* Fcck = 50Mhz, Fosc = 300Mhz, and USB 48Mhz */
 
#define PLL_MValue      24
#define PLL_NValue  1
#define CCLKDivValue    5
#define USBCLKDivValue  6
 
/* System configuration: Fosc, Fcclk, Fcco, Fpclk must be defined */
/* PLL input Crystal frequence range 4KHz~20MHz. */
 
#define Fosc    12000000
 
/* System frequence,should be less than 80MHz. */
#define Fcclk   50000000
#define Fcco    300000000
 
/* APB clock frequence , must be 1/2/4 multiples of ( Fcclk/4 ). */
/* If USB is enabled, the minimum APB must be greater than 16Mhz */ 
 
#define Fpclk   (Fcclk / 2)
 
/* modes */
 
#define I2C_MODE_ACK0 0
#define I2C_MODE_ACK1 1
#define I2C_MODE_READ 2
 
/* return codes */
 
#define I2C_CODE_OK   1
#define I2C_CODE_DATA 2
#define I2C_CODE_RTR  3
 
#define I2C_CODE_ERROR -1
#define I2C_CODE_FULL  -2
#define I2C_CODE_EMPTY -3
#define I2C_CODE_BUSY  -4
 
#define I2C_SLAVEADR_RCV  0xA1 
#define I2C_SLAVEADR_SEND 0xA0
 
/* I2C Control set register */
 
#define I2C_CONSET_I2EN              0x40   /* Bit 6: I2EN (I2C interface enable) */
#define I2C_CONSET_I2EN_DISABLED     0x00   /* Disabled */
/* #define I2C_CONSET_I2EN_ENABLED      0x01   Enabled */
 
#define I2C_CONSET_STA               0x20   /* Bit 5: STA (Start flag) */
#define I2C_CONSET_STA_NO_START      0x00   /* No start */
/* #define I2C_CONSET_STA_START         0x01    Start */
 
#define I2C_CONSET_STO               0x10   /* Bit 4: STO (Stop flag) */
#define I2C_CONSET_STO_NO_STOP       0x00   /* No stop */
/* #define I2C_CONSET_STO_STOP          0x01    Stop */
 
#define I2C_CONSET_SI                0x08   /* Bit 3: SI (I2C interrupt flag) */
#define I2C_CONSET_SI_NO_INTERRUPT   0x00   /* No interrupt */
/* #define I2C_CONSET_SI_INTERRUPT      0x01    Interrupt */
 
#define I2C_CONSET_AA                0x04   /* Bit 2: AA (Assert acknowledge flag) */
#define I2C_CONSET_AA_NO_ACK         0x00   /* Not Acknowledge (Not Acknowledge will be sent when data byte is received) */
/* #define I2C_CONSET_AA_ACK            0x01   Acknowledge (Acknowledge will be sent if certain conditions occur) */
 
/* I2C status register */
#define I2C_STAT_STATUS              0xF8   /* Bit 7-0: STATUS (Status) */
 
/* I2C data register */
 
#define I2C_DATA_DATA                0xFF   /* Bit 7-0: DATA (Data) */
 
/* I2C Slave Address Register */
 
/* #define I2C_ADDR(replaced by SLAVE)_ADDR                0xfe    Bit 7-1: ADDR (Slave mode address) */
 
#define I2C_SLAVE_ADDR                0x38   /* Bit 7-1: ADDR (Slave mode address) */
#define I2C_SLAVE_GC_GENERAL          0x01   /* Bit 0: GC (General call bit) General call received */
#define I2C_SLAVE_GC_NOT_GENERAL      0x00   /* Not general call */
 
/* I2C SCL Duty Cycle high register */
 
#define I2C_SCLH_COUNT               0x007D /* 200kHz Bit 15-0: COUNT (Count for SCL high time period) */
 
/*  I2C SCL Duty Cycle Low Register */
 
#define I2SCLL_COUNT               0x007D /* 200kHz Bit 15-0: COUNT (Count for SCL low time period) */
 
/*  I2C Control Clear Register */
 
#define I2C_CONCLR_I2ENC             0x40   /* Bit 6: I2ENC (I2C interface disable) */
#define I2C_CONCLR_I2ENC_NO_EFFECT   0x00   /* No effect */
/* #define I2C_CONCLR_I2ENC_CLEAR       0x01    Clear  (I2C Disabled) */
 
#define I2C_CONCLR_STAC              0x20   /* Bit 5: STAC (Start flag clear) */
#define I2C_CONCLR_STAC_NO_EFFECT    0x00   /* No effect */
/* #define I2C_CONCLR_STAC_CLEAR        0x01    Clear start */
 
#define I2C_CONCLR_SIC               0x08   /* Bit 3: SIC (I2C interrupt clear) */
#define I2C_CONCLR_SIC_NO_EFFECT     0x00   /* No effect */
/* #define I2C_CONCLR_SIC_CLEAR         0x01    Clear interrupt */
 
#define I2C_CONCLR_AAC               0x04   /* Bit 2: AAC (Assert acknowledge clear) */
#define I2C_CONCLR_AAC_NO_EFFECT     0x00   /* No effect */
/* #define I2C_CONCLR_AAC_CLEAR         0x01    Clear acknowledge */
 
void i2cReset(void);
 
 
__irq void I2C_ISR(void) ;
 
   void ISR_8(void); 
void ISR_18(void); 
void ISR_28(void); 
 
   
/*tU8  i2cCheckStatus(void);
void i2cInit(void);
tS8  i2cStart(void);
tS8  i2cRepeatStart(void);
tS8  i2cStop(void);
tS8  i2cPutChar(tU8 data);
tS8  i2cGetChar(tU8  mode, tU8* pData);
tS8  i2cWrite(tU8  addr, tU8* pData, tU16 len);
tS8  i2cRead(tU8  addr, tU8* pBuf, tU16 len);
tS8  i2cWriteWithWait(tU8 data);*/
 
#endif
 
 
/*****************************************************
 *presure_tst.c: Demo code to test the functionality 
******************************************************/
 
#include <nxp/iolpc2468.h>
#include <intrinsics.h>
#include "irq.h"
#include "i2c.h"
 
/******************************************************************************
 * Defines and typedefs
 *****************************************************************************/
 
#define I2C_REG_CONSET      0x40 /* Control Set Register I2C enable */
#define I2C_REG_CONSET_MASK 0x7C /* Used bits                    */
 
#define I2C_REG_DATA        0x00 /* Data register                */
#define I2C_REG_DATA_MASK   0xFF /* Used bits                    */
  
/*I2C in Slave mode */
   
#define I2C_SLAVE_REG_ADDR        0x00 /* Slave address register       */
#define I2C_SLAVE_REG_ADDR_MASK   0xFF /* Used bits                    */
 
   //#define I2C_REG_SCLH        0x00000040 /* SCL Duty Cycle high register */
 
  /*#define I2C_REG_SCLH        0xF0  SCL Duty Cycle high register */
#define I2C_REG_SCLH            0xC
#define I2C_REG_SCLH_MASK       0xFFFF /* Used bits                    */
 
   //#define I2C_REG_SCLL        0x00000040 /* SCL Duty Cycle low register  */
 
/*#define I2C_REG_SCLL        0x0160  SCL Duty Cycle low register  */
 
#define I2C_REG_SCLL        0xD
#define I2C_REG_SCLL_MASK   0xFFFF /* Used bits                    */
 
void i2cReset(void)
{
  
 
  /*IO0SET  |= 0xF0;*/
  I2C0ADR = 0x38; 
  PINSEL0  |= 0x00000050; /*rxd0 and txd 0 */
  PINSEL0  &= 0xFFFFFF5F;
  
  PINSEL1 &= 0xFC3FFFFF; /* sda0 scl0*/
  PINSEL1 |= 0x01400000;
  
  I2C0CONCLR = 0x6C;   /* clear flags */
  I2C0CONSET = 0x40; /* enable master functions */
    /* reset registers */
  I2C0SCLL              = ( I2C0SCLL   & ~I2C_REG_SCLL_MASK )   | I2C_REG_SCLL;
  I2C0SCLH              = ( I2C0SCLH   & ~I2C_REG_SCLH_MASK )   | I2C_REG_SCLH;
  
  /*VICIntEnable = 0x00000200; //enable interrupt*/
  VICINTENCLEAR=0xffffffff;
  VICINTSELECT = 0x00;
  VICINTENABLE |= 0x200;
  VICVECTPRIORITY9=0x00;
  VICVECTADDR9 = (unsigned long) &I2C_ISR;
    
 }
 
/********************** I2C ISR **************************/ 
 
__irq void I2C_ISR(void)
 
{ 
  
 /* unsigned int vector;*/
  
  int temp=0; 
  /* vector=VICADDRESS;*/
  temp=I2C0STAT; 
  
 switch(temp) 
 { 
  case 8: 
  ISR_8(); 
  break; 
 
  case 24: 
  ISR_18(); 
  break; 
 
 case 40: 
  ISR_28(); 
  break; 
 
  default : 
  break; 
 } 
   VICADDRESS=0xFF; 
  } 
 
 
/* I2C states*/ 
 
/* Start condition transmitted */ 
void ISR_8() 
 { 
 /* Port Indicator */ 
 IO0CLR=0x10; 
 /* Slave address + write */ 
 I2C0DAT=0x74; 
 /* Clear SI and Start flag */ 
 I2C0CONCLR=0x28; 
 /* Port Indicator */ 
 IO0SET=0x10; 
 } 
 
/* Acknowledgement received from slave for slave address */ 
void ISR_18() 
 { 
 /* Port Indicator */ 
 IO0CLR=0x20; 
 /* Data to be transmitted */ 
 I2C0DAT=0x55; 
 /* clear SI */ 
 I2C0CONCLR=0x8; 
 /* Port Indicator */ 
 IO0SET=0x20; 
 } 
 
/* Acknowledgement received from slave for byte transmitted from master. Stop 
condition is transmitted in this state signaling the end of transmission */ 
void ISR_28() 
 { 
 /* Port Indicator */ 
 IO0CLR=0x80; 
 /* Transmit stop condition */ 
 I2C0CONSET=0x10; 
 /* clear SI */ 
 I2C0CONCLR=0x8; 
 /* Port Indicator */ 
 IO0SET=0x80; 
 
 }