i2c interface in SFT transceivers

[tramu]

Dear Sir,

We would like connect I2C master to 8-I2C slaves(SFP Optical transceivers) which will not have I2C addresses to distinguish.

Is it possible to implement I2C address encoding from the master inside FPGA to access each SFP transceivers's I2C internal space ?

How about using I2C switch PCA9548A ?

Thanks in advance.

Regards,
Thulasi

 

[optoroute]

The PCA9548A is an octal bidirectional translating Switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels CAN be selected, determined by the contents of the programmable control Register An active LOW reset input allows the PCA9548A to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-on reset function. The pass Gates of the switches are constructed such that the VDD pin CAN be used to limit the maximum high voltage which will be passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts CAN communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.

By Optoroute