I want to design to pipeline adc, for training.

[totoro]

Could you give me a reasonable specification which need include speed, resolution, power at least.
I prefer to choose vdd as 3.3v, 0.35 or 0.25 CMOS process.
The followering purposes are expected to achieve though this training:
1. deeply understanding the S/H circuit design
2. high speed comparator design technique
3. digital calibrate technique

Any one would help me?

 

[santhoshv78]

You can refer some of the datasheets of ppipelined ADC for the specification..
For training, I guess, 10bit - 50M to 100MHz is ok..

 

[nxing]

go to **broken link removed** to download some thesis and the follow them.....

Good Luck

 

[stanlangley]

The book "Data onverters for communication" is also a good reference.

 

[Eboy]

Check this for understanding and practicing:

**broken link removed**


It is a very good Application Notes.

 

[totoro]

Thank you all