i need help in measuring the settling time

[wael_wael]

hi guys
could some one of our friends here explain how to do settling time measurement of fully differential amplifier (better if the circuit illustrated in figure), how to make the step unit signal as differential input
i used this circuit below to measure the settling time, but there is a problem that is the input amplitude is effected by VCM not by clock signal amplitude and the out put signals not equal in amplitude and in settling time.

regards

 

[yezeg]

Is it for simulation ?

 

[wael_wael]

yes sure, how to do simulation of fully differential OTA
thank u

 

[wael_wael]

pls help me in this matter, i have used one configuration but i am not sure about result, could some one send me circuit configuration to find the settling time for differential output
regards

 

[safwatonline]

Hello,
it is not a clear figure, but is the clock signal differential as from what i see it is CM

 

[wael_wael]

yes the clock signal is differential, the problem the out put is not equal in amplitude and settling time. is it the problem come from the configuration or form the input signal
63 persons have seen this topic and no body has solution, what happened guys
regards

 

[linrb]

i feel the structure of simulation is right, but i do not understand your problem.

 

[safwatonline]

Hello,
again are u sure that the clock is working as differential signal in that configuration, i think in the shown schematic it is connected as Common mode