mostafa0020
Member level 1
PLL Filter Design"?
Hi ALL,
I use "4046 Chip " as a PLL with a reference frequency of 50 Hz " Power Frequency" with a divider in feedback N=60 "two 4017 Chips" and using Phase Comparator 2 to obtain zero degree phase shift between input and output when in lock, the VCO is a wave generation circuit consisting of "ICL8038 Chip" linear triangular VCO,The problem is closing the loop with a suitable filter.
Please, Advise me about selecting the proper filter " wheather active or passive, 1st or 2nd order,.." elements,how can I calculate this filter elements????
Hi ALL,
I use "4046 Chip " as a PLL with a reference frequency of 50 Hz " Power Frequency" with a divider in feedback N=60 "two 4017 Chips" and using Phase Comparator 2 to obtain zero degree phase shift between input and output when in lock, the VCO is a wave generation circuit consisting of "ICL8038 Chip" linear triangular VCO,The problem is closing the loop with a suitable filter.
Please, Advise me about selecting the proper filter " wheather active or passive, 1st or 2nd order,.." elements,how can I calculate this filter elements????