I am getting MAD with these Synthesis result.Can anyone help

[eda_wiz]

how to calculate number of kgates from area

hi all,
I am in a serious synthesis problem.

I was trying to synthesise a small logic in asic. When I synthesise the logic using different asic libraries I am getting huge differences in the gate count. I tried synthesising with Leonardo Spectrum and Synplify ASIC . When I synthesise my logic with the default asic library supplied by the eda tool vendor it synthesise to a very small number of gates. That is when I synthesised my code with the default SCL05u ASIC library supplied with Leonardo SPectrum .. the total number of gates was 2.5Kgates. I then downloaded tsmc .25u library from ment0r website and synthesised with that library .. I got a total gate count of 12 Kgates . Similarly with s*ynplify asic tool I synthezised for ami .35 micron process (a limited cell library is bundled with the tool). I got gatescount as 917 gates. I then synthezied for TSMC .13 micron process. I got 4 Kgates ..

All the 4 synthesis were done for the same RTL Code.

I doubt whether I am missing some important configuration settings in these tools


can anyone help me in this regard.

Here are the report from the synthesis tools about cell usage

TOOL ...Synplify ASIC , Library - TSMC .13 micron
***************************************************

Report for cell logic.arch
Cell usage:
cell count area count*area
NAND2XL 84 5.1 427.7
NOR2XL 69 5.1 351.4
NAND3XL 62 6.8 421.0
INVXL 30 3.4 101.8
NAND4XL 27 8.5 229.1
AOI32XL 22 11.9 261.4
NOR4XL 16 8.5 135.8
AOI33XL 16 13.6 217.3
INVX1 15 3.4 50.9
AOI211XL 14 8.5 118.8
AOI22XL 13 10.2 132.4
OAI21XL 9 6.8 61.1
AOI221XL 9 11.9 106.9
NOR3XL 9 6.8 61.1
OAI211XL 9 8.5 76.4
OAI2BB1XL 7 8.5 59.4
OAI31XL 7 8.5 59.4
AND4XL 6 10.2 61.1
AO22XL 5 10.2 50.9
AND2XL 3 6.8 20.4
OAI32XL 3 11.9 35.6
XNOR2XL 3 11.9 35.6
OAI2BB2XL 2 10.2 20.4
AOI2BB1XL 2 8.5 17.0
AOI222XL 2 13.6 27.2
XOR2XL 2 11.9 23.8
AOI2BB2XL 2 10.2 20.4
NAND4BXL 2 10.2 20.4
CLKINVX2 2 5.1 10.2
OAI33XL 1 13.6 13.6
OAI221XL 1 11.9 11.9
OR4XL 1 10.2 10.2
NAND2BXL 1 6.8 6.8
AND3XL 1 8.5 8.5
OA22XL 1 10.2 10.2
AOI31XL 1 10.2 10.2
OA21XL 1 8.5 8.5
AOI21XL 1 8.5 8.5
AND2X1 1 6.8 6.8
NAND2X1 1 5.1 5.1
AO21XL 1 8.5 8.5
----- ----------
TOTAL 464 3323.5
Mapper successful!


TOOL ...Leonardo Spectrum , Library - SCL05u .5 micron (this library is suplied with spectrum)
***************************************************

Cell Library References Total Area


Cell Library References Total Area

AN3T0 scl05u 2 x 6 12 gates

AO1A0 scl05u 11 x 6 68 gates

AO1I0 scl05u 9 x 6 56 gates

AO2A0 scl05u 5 x 8 39 gates

AO2I0 scl05u 2 x 8 15 gates

AO2L0 scl05u 3 x 8 23 gates

AO3I0 scl05u 1 x 8 8 gates

AO5A0 scl05u 6 x 11 65 gates

AO6I0 scl05u 3 x 11 33 gates

AO6L0 scl05u 6 x 11 64 gates

AO6L2 scl05u 1 x 11 11 gates

AO8L0 scl05u 4 x 14 57 gates

AOA4I0 scl05u 27 x 8 205 gates

IV1N0 scl05u 92 x 3 285 gates

IV1N1 scl05u 5 x 3 16 gates

IV1N2 scl05u 1 x 3 3 gates

MX2T0 scl05u 1 x 6 6 gates

ND2N0 scl05u 59 x 5 266 gates

ND2N1 scl05u 9 x 5 42 gates

ND3N0 scl05u 1 x 6 6 gates

ND4N0 scl05u 2 x 8 15 gates

ND6N0 scl05u 4 x 11 44 gates

ND8N0 scl05u 1 x 14 14 gates

NR2R0 scl05u 31 x 5 140 gates

NR2R1 scl05u 13 x 5 61 gates

NR2R2 scl05u 9 x 5 46 gates

NR3R0 scl05u 2 x 6 12 gates

OA1R0 scl05u 5 x 6 31 gates

OA4R0 scl05u 4 x 8 31 gates

OAI1A0 scl05u 10 x 6 62 gates

OAI2N0 scl05u 4 x 8 30 gates

OAI3N0 scl05u 8 x 8 61 gates

OAI3R0 scl05u 2 x 8 15 gates

OAI5N0 scl05u 5 x 11 54 gates

OAI5R0 scl05u 2 x 11 22 gates

OAI8N0 scl05u 22 x 14 312 gates

OAOI0 scl05u 18 x 8 137 gates

OR2T0 scl05u 1 x 5 5 gates

OR3T0 scl05u 2 x 6 12 gates

OR4T0 scl05u 1 x 8 8 gates

OR6T0 scl05u 5 x 11 55 gates

OR8T0 scl05u 5 x 14 70 gates



Number of ports : 16
Number of nets : 412
Number of instances : 404
Number of references to this view : 0


Total accumulated area :

Number of gates : 2519

Number of accumulated instances : 404






TOOL ...Synplify ASIC , Library - AMI .35u (a limited cell library that is bundled along with the tool)
***************************************************
Report for cell logic.arch
Cell usage:
cell count area count*area
na21 94 1.0 94.0
no21 91 1.0 91.0
an41 48 2.0 96.0
na31 42 2.0 84.0
inv1 33 1.0 33.0
na41 32 2.0 64.0
aa31 31 2.0 62.0
on31 18 2.0 36.0
on41 17 2.0 34.0
no31 16 2.0 32.0
an31 16 2.0 32.0
no41 15 2.0 30.0
inv2 14 1.0 14.0
na51 14 3.0 42.0
no22 11 2.0 22.0
na22 11 2.0 22.0
or31 10 2.0 20.0
na23 6 4.0 24.0
inv3 5 2.0 10.0
on11 4 2.0 8.0
inv4 3 2.0 6.0
en21 3 3.0 9.0
and2 2 6.0 12.0
an11 2 2.0 4.0
no51 2 3.0 6.0
an52 2 4.0 8.0
aa21 2 2.0 4.0
on21 1 2.0 2.0
an21 1 2.0 2.0
or41 1 3.0 3.0
or21 1 2.0 2.0
na81 1 6.0 6.0
no23 1 4.0 4.0
----- ----------
TOTAL 550 918.0
Mapper successful!




TOOL ...leonardo Spectrum , Library - TSMC .25micron (downloaded from ment0r ftp site)
***************************************************

Cell Library References Total Area


Cell Library References Total Area

AND4X2 tsmc25_fast 14 x 35 484 gates

AOI211X1 tsmc25_fast 2 x 35 69 gates

AOI21X1 tsmc25_fast 3 x 29 86 gates

AOI221X1 tsmc25_fast 24 x 40 967 gates

AOI222XL tsmc25_fast 11 x 46 507 gates

AOI22X1 tsmc25_fast 7 x 35 242 gates

AOI2BB1X1 tsmc25_fast 2 x 29 58 gates

AOI31X1 tsmc25_fast 1 x 35 35 gates

AOI32X1 tsmc25_fast 2 x 40 81 gates

AOI33X1 tsmc25_fast 3 x 46 138 gates

CLKINVX1 tsmc25_fast 92 x 12 1058 gates

MXI2XL tsmc25_fast 1 x 40 40 gates

NAND2BX1 tsmc25_fast 36 x 23 828 gates

NAND2X1 tsmc25_fast 39 x 17 675 gates

NAND3BXL tsmc25_fast 1 x 29 29 gates

NAND3XL tsmc25_fast 7 x 23 161 gates

NAND4X1 tsmc25_fast 9 x 35 311 gates

NOR2BX1 tsmc25_fast 5 x 29 144 gates

NOR2BXL tsmc25_fast 25 x 23 575 gates

NOR2X1 tsmc25_fast 5 x 23 115 gates

NOR2XL tsmc25_fast 24 x 17 415 gates

NOR3XL tsmc25_fast 10 x 23 230 gates

NOR4XL tsmc25_fast 2 x 35 69 gates

OAI211XL tsmc25_fast 20 x 29 576 gates

OAI21XL tsmc25_fast 44 x 23 1012 gates

OAI221X1 tsmc25_fast 4 x 40 161 gates

OAI222X1 tsmc25_fast 2 x 46 92 gates

OAI22XL tsmc25_fast 39 x 29 1123 gates

OAI2BB1X1 tsmc25_fast 14 x 29 403 gates

OAI2BB2X1 tsmc25_fast 9 x 40 363 gates

OAI32X1 tsmc25_fast 2 x 40 81 gates

OR4X1 tsmc25_fast 1 x 35 35 gates



Number of ports : 16
Number of nets : 468
Number of instances : 460
Number of references to this view : 0


Total accumulated area :

Number of gates : 11164

Number of accumulated instances : 460



Now please tell Me veterans . Am I missing someting .. OR ARE these tools MAD?



PLease Helppppppppppp

tnx

 

[joe2moon]

ami 35u

Please normalize the result before comparison !

You cannot compare things in different units

For example, use 2-input NAND gate as an unit,
you can calculate & get the equivalent gate count in each case.

A little difference is possible, but if the difference is too large,
then double-check the base of each result.

 

[jobnom99]

aoi31x1

Dear...

gate count is based on ND2 gate to Unit cell.
but, according to vendor , unit value is some different.

for example , UMC/FTC ND2 = 2.7
UMC/GCI ND2 = 64.8

if total gate is 10000

UMC/FTC = 10000 / 2.7
UMC/GCI = 10000/ 64.8

it had better read library datasheet about gate count.

or you can cell report and you can see ND2 area and total area.

you can get gate_count total_area / ND2 area

hoping to Help.


Best..........

 

[eda_wiz]

scl05u

hi joe2moon & jobnom,
thanks for the reply. I searched the help files for both tools. But could not find an option to normalise results.. Can you help me to find out where is the option in these tools.

thanks

 

[eda_wiz]

leonardospectrum asic library

hi jobnom,
can you tell me where to find out the unit value for a partcular library .. ie where do you get the values 2.7 & 64.8 given in your example?
I searched the datasheet but it doesnot say anything about that. Please help

thanks