hysteresis comparator design

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sissi

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hi,
i want to design a hysteresis comparator ,as shown fig.my question is :
1) what is the gain, how to increas the gain.
2) hot to simulate the offset voltage and if it is great ,how to reduce it.
and what should i make attention during design the circuit?



reguards

sissi
 

Offset - Hysterisis should be same on both sides, so if you see one side hysterisis different than the other...that could be offset. but i am not sure.

Gain - gm of input devices decides the gain...so increse them to add more gain but remember this comes with a speed trade off.

refer Jacob Baker for design procedure. Good luck!
 

in general, you could increase the length of the transistors to obtain large gain.
if you would like to considerate your area, you could increase the voltage gain by reduce the biasing current, but it will influence the circuit speed.

Added after 1 minutes:

you can use unity-gain configuration to simulate the offset voltage. please see ALLEN's book.
 

offset-- use unity-gain configuration to simulate easily;
gain--increase the length, W/L of input transistor or positive feedback factor (W/L)6/(W/L)4, and gain of output stage;

good luck
 

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