hspice output
Hello, everyone,
I have a question . As we know , hspice output file can give us lots of useful information about the circuit behaviour. For example, we can know the MOS transistor is in saturation region, or linear ,or cut-off. And we know every transistor's Gm, Gds, Ids, Vth, Gdsat and so on. Therefore, we can judge whether our circuit is in right state.
However, in discrete circuits like switched capacitor filter, to what extent do we trust the information given by the output file. The transistors as switch are shown either cut-off or linear , as a result, the transistors in OPAMP are shown different state. They are possibly in saturation , linear or cut-off as well.
Here is my question, if the critical transistor like the input transistor of OPAMP (which is connected with switch) is shown cutoff state in the output file after Hspice simulation , which choice should I make ? My OPAMP design goes wrong or it is a possibility to occur? PS: my opamp works well in all corner case in continuous circuits.
I hope I get my question clear and wish for more comments .
By the way, in a transient simulation, at which time point do the output file show ?
I works in Analog Design Environment in Cadence. (I know the Hspice in PC can indicate which time point to output, but how to do it in ADE , it only support schematic input , nor netlist input)
Thanks