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If there even -is- a LDMOS compact model, the resistance
is modulated by the gate and drain potentials. Every LDMOS
and VDMOS model I've run across, though, has been a
macromodel. A compact model (I'd think) would have separate
channel and drift region terms, but these might not be brought
out as accessible OP values.
A crawl through the reference manual might tell you.
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