Arsalan_gh
Newbie
Hi
I'm trying to use A-verilog model for CNTFET. below is my code for a simple inverter:
******************************************************************************************
******************************************************************************************
the problem is that get errors such as:
******************************************************************************************
******************************************************************************************
What is the problem???
Thanks all
I'm trying to use A-verilog model for CNTFET. below is my code for a simple inverter:
Code:
******************************************************************************************
.options POST=2
.options AUTOSTOP
.options INGOLD=2 DCON=1
.options GSHUNT=1e-12 RMIN=1e-15
.options ABSTOL=1e-5 ABSVDC=1e-4
.options RELTOL=1e-2 RELVDC=1e-2
.options NUMDGT=4 PIVOT=13
.options runlvl=6
.param TEMP=27
***************************************************
*top-level n-CNFET Standard Model
.hdl ‘NCNFET_L3.va’
*top-level p-CNFET Standard Model
.hdl ‘PCNFET_L3.va’
***************************************************
Vdd supply Gnd 0.9
Vin in Gnd PULSE(0 0.9 1p 1p 1p 0.5m 1m)
***************************************************
*Top level n-CNFET Standard Model:
XCNT1 Gnd in out Gnd NCNFET Lch=L_channel Lgeff=Lceff Lss=L_sd Ldd=L_sd Efi=Efo Kgate=Kox Tox=4.0e-9 Csub=20.0e-12 Ccsd=Ccsd CoupleRatio=CoupleRatio Vfbn=0.0 Dout=1.0 Sout=0.0 Pitch=20e-9 Wgate=sub_pitch n1=19 n2=0 tubes=1
*Top level p-CNFET Standard Model:
XCNT2 supply in out supply PCNFET Lch=L_channel Lgeff=Lceff Lss=L_sd Ldd=L_sd Efi=Efo Kgate=Kox Tox=4.0e-9 Csub=20.0e-12 Ccsd=Ccsd CoupleRatio=CoupleRatio Vfbp=0.0 Dout=1.0 Sout=0 Pitch=20.0e-9 Wgate=sub_pitch n1=19 n2=0 tubes=1
***************************************************
.end
******************************************************************************************
the problem is that get errors such as:
******************************************************************************************
Code:
*pvaE* Please invoke hspice script instead of binary.
**error** call to epvaHDLinit failed.
**error** Failed to read Verilog-A file, see 'C:\Users\Arsalan\Desktop\New folder\tst.valog' file for details.
**error** (tst.sp:2) difficulty in reading input
******************************************************************************************
What is the problem???
Thanks all
Last edited by a moderator: