umairsiddiqui
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in **broken link removed** i've lump all the control logic including bus control in single
<big> fsm. bus protocol is opencores.org wishbone. now i wanted to add <basic level> support for amba and core-connect.
i want to keep the bus control logic separate -- so that one can support multiple buses. suggest modular break-down strategy of big fsm and inter-comm protocol b/w resulting smaller fsms. i confuse with description given in douglus smith's design book [hdl chip design] description of interactive fsms...require more info about this issue.
next issue is where to find info related to core-connect (its docs and other impl info), it seem it require some kind of registration??
basically i want to use the processor with edk...saving myself from write parapherials...that is reason i've previously posted "suggest the project on spartan3 starter kit"...i ve write both peripherals and assembler as well???
edk might save me from writing peripherals <i hope>
:|
<big> fsm. bus protocol is opencores.org wishbone. now i wanted to add <basic level> support for amba and core-connect.
i want to keep the bus control logic separate -- so that one can support multiple buses. suggest modular break-down strategy of big fsm and inter-comm protocol b/w resulting smaller fsms. i confuse with description given in douglus smith's design book [hdl chip design] description of interactive fsms...require more info about this issue.
next issue is where to find info related to core-connect (its docs and other impl info), it seem it require some kind of registration??
basically i want to use the processor with edk...saving myself from write parapherials...that is reason i've previously posted "suggest the project on spartan3 starter kit"...i ve write both peripherals and assembler as well???
edk might save me from writing peripherals <i hope>
:|
