Hi all,
I am running a AMS simulation in Cadence virtuoso. My output from a block (in verilog code) is a bus of 19 bits.
I want to write a verilogA code to write the bus data (at every negative edge of clock) in a text file.
integer file_open;initialbegin// Open file
file_open =$fopen("bus19.txt","w");endalways@(negedge clk)beginif(flag_latch_bus_out)$fwrite(file_open,"%h\n",bus_name);// bus_name: you want to get values.// %h you want to write bus data is hex / %d : decimalend