T
treez
Guest
Hello, I am using the CMOS latch SN74LVC1G373......
Datasheet of latch
https://www.ti.com/lit/ds/symlink/sn74lvc1g373.pdf
Normally the D input will be logic high...........every now and then, the D input will go low for 2us.......i want the Q output to go low and stay low, i.e. to stay low even when the D input goes back high.
Can you confirm that this is not possible with this particular latch?.....since when LE is low, Q simply doesnt change, wheras i want Q to change but then stay put.
...do you know of a latch type that does what i want?
Datasheet of latch
https://www.ti.com/lit/ds/symlink/sn74lvc1g373.pdf
Normally the D input will be logic high...........every now and then, the D input will go low for 2us.......i want the Q output to go low and stay low, i.e. to stay low even when the D input goes back high.
Can you confirm that this is not possible with this particular latch?.....since when LE is low, Q simply doesnt change, wheras i want Q to change but then stay put.
...do you know of a latch type that does what i want?