Ashvinikumar
Newbie level 6
Hi...
How do i reduce the threshold voltage(Vth) of a single NMOS transistor in a circuit?the model file specifies 0.37v(TSMC 90nm node) but for my circuit i need the Vth to be around 0.2v,applying body bias increases the threshold voltage,how to reduce the Vth??
Thank you in advance
How do i reduce the threshold voltage(Vth) of a single NMOS transistor in a circuit?the model file specifies 0.37v(TSMC 90nm node) but for my circuit i need the Vth to be around 0.2v,applying body bias increases the threshold voltage,how to reduce the Vth??
Thank you in advance