Yassir_eldo
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Hello,
I am currently willing to design circuits using the Barkley's BSIMSOI model file. I have tried to use that model in ELDO, but infortunatly my simulation was failed, because the majority of SOI parameters are ignored, and ELDO return an error at the end. I think that is relative to the verilog-A file (.va) that I ignore how to include to simulate my designs. Can anybody help me please ??
Thank you in advance
I am currently willing to design circuits using the Barkley's BSIMSOI model file. I have tried to use that model in ELDO, but infortunatly my simulation was failed, because the majority of SOI parameters are ignored, and ELDO return an error at the end. I think that is relative to the verilog-A file (.va) that I ignore how to include to simulate my designs. Can anybody help me please ??
Thank you in advance