How to use fixed point in fpga design using ISE?

[mmoctar]

I need help about how can I use fixed point in fpga design I'm using ISE, par exemple when I want to use 3.2, when I use real number it can't synthesis it.

 

[khaila]

Re: fixed point in ise

I need help about how can I use fixed point in fpga design I'm using ISE, par exemple when I want to use 3.2, when I use real number it can't synthesis it.

You may consider the fixed point as a normal binary representation.
for example:
if you want to represent 10.75 then do as follow
10 = 1010
.75 = 0.11
the whole rep. is:
6.2 unsigned

which means:
001010.11
but in FPGA you may consider it as:
101011

if you want to multiply the current value by 2 then
101011 x 10 = 01010110
becasue the rep. is 6.2 unsigned then:
the next value is:
010101.10

 

[mmoctar]

Re: fixed point in ise

I'm using xilinx fft core, all my inputs don't have std_logic_vector(integer) but the core use then like fixed point and I don't if the result is true cause the outputs are fixed point, but I know the different part of the outputs.