Hi Everyone,
I've designed a FPGA board. There are 4 DDR3L RAM ICs on the board and I want to test RAM communication speed. What is the proper way to do it?
The few DDR cores I've worked with from FPGA vendors in the past usually have a synthesizable testbench that you can implement in your FPGA that does a RAM test of some sort.
If the IP doesn't include something like that, just build a simple processor system with DDR and run a RAM test using standard memory test C code running on the embedded processor.