nandakishore.mehrwade
Newbie level 3
Hi everyone,
I am using fixed_pkg.vhd for our project. I want to divide two signals of type sfixed. When I use normal division ('/') operand I am able to simulate. But when I try to synthesize, it shows error division operand cannot be synthesize. Can anyone please let me know how to proceed. Is there any package available to do this. Thank you in advance.
I am using fixed_pkg.vhd for our project. I want to divide two signals of type sfixed. When I use normal division ('/') operand I am able to simulate. But when I try to synthesize, it shows error division operand cannot be synthesize. Can anyone please let me know how to proceed. Is there any package available to do this. Thank you in advance.