This is huge dynamics. Does it make sense at all?The range is 7.3Hz to 8MHz.
This is "best case" whishful thinking. But I asked about "worst case" limit.I would like the phase accuracy
Hello KlausHi,
This is huge dynamics. Does it make sense at all?
This is "best case" whishful thinking. But I asked about "worst case" limit.
No comment about my recommended solution?
Klaus
Hi
Hi DanaThe 5LP family,
View attachment 179616
If the PWMs integer multiples of reference PWM clock one could imagine
synchronization. Or just a bunch of Async running parts always starting
at a synch reset.....
Regards, Dana.
Hello Klaus
My understanding of the suggested solution is that
(a) The PWM duty is compared with the captured timer value.
(b) Because the same timer is used for PWM and capture, we know that the value captured is the time offset from the start of the PWM cycle
(c) We then want to see (time captured) = (PWM duty)
The 16F1825 DS shows that capture mode uses TMR1, wheras PWM mode uses of one of the 8-bit Timer2/4/6 timers.
Regards
Stephen
--- Updated ---
Hi
I am interested how in general in might be possible to synchronise 2 PICs sharing one clock. The PWM case is simply an example 'use case' for this.
In my example, the existing circuit is designed as a generic 2 channel PWM. As such, a user might find it useful to relate the phases of two PWM signals. Some examples
By 'synchronise' I mean a known time offset from the start of one duty to the start of another duty.
- Quadrature
- Experimenting with SMPS designs. Here the signals might well have different duty. We might want PWM 2 to 'fire' somewhere about the middle of PWM 1's mark (or space), and we might like to control 'somewhere about' to be a particular known value.
--- Updated ---
Hi Dana
If I clock two PICs (running identical code) from one crystal oscillator module, and do a synchronous reset then is it guaranteed that both PICs execute their first instruction cycle on the same clock edge?
Regards
Stephen
If I clock two PICs (running identical code) from one crystal oscillator module, and do a synchronous reset then is it guaranteed that both PICs execute their first instruction cycle on the same clock edge?
But also in post#1 the OP tells that both PICs share a common system clock.
So the system clock should be fairly aligned. I even expect this with a locked PLL.
Hi KlausHi,
@danadakk:
The OP already knows/expects that the PWM are out of sync. So, no need to test this.
And this is the reason why the OP asks for a "synchronizer".
But also in post#1 the OP tells that both PICs share a common system clock.
So the system clock should be fairly aligned. I even expect this with a locked PLL.
And again: if the PLL loses it´s lock, then the synchronizer need do it´s job.
Klaus
--- Updated ---
Hi,
@OP:
In post#1 you ask about synchronizing the PWM of different PICs.
My answer: Yes, but with minor timing errors. I asked for the tolerance, but still no information.
Now you ask to synchronize two PICs.
Here I have to say: No. You won´t be able to "code synchronize" them.
Klaus
In post#15 I said "no" to code synchronisation. Please read through the posts/ideas of the others.However, the wider question mentioned (actual code synchronisation) might have some use-cases
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