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How to start OTA noise analysis and optimization?

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amic

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I am working on OTA ( OP amp) noise analysis and optimisation and would like to know how to typically start. I mean from where ? Anybody tried this before ?

thanks,

Sachin
 

Noise Analysis

read the book
cmos analog circuit design
allen
chap 7
 

Noise Analysis

use the hspice command .noise , you can simulation the circult noise
 

Noise Analysis

razavi or allen si a good point to start. than move on to cadence tutorials on noise simulations. allthough for runing noise analyses in cadence you don't really need a tutorial.
good luck!
 

Re: Noise Analysis

I also want to use SPECTRE of Cadence to simulate noise, and I find there is noise analysis in SPECTRE, but I really wonder how to use it.
For instance, how to apply the input of the OPA? Use a "pin" or a normal voltage source or a "port"?
What's more, how about the output of the OPA?
I have read the tutoral, but I still don't kown how to do.
I really need your help.
Thanks.
 

Re: Noise Analysis

In cascode structore OTA the cascode mos length maybe longer than the non-cascode mos.
 

Re:Noise Analysis of CMOS Inverter

sunking said:
read the book
cmos analog circuit design
allen
chap 7

I did the noise analysis using cadence and found some wierd results. How come, my results are showing that pmos is producing more flicker noise and less thermal noise compaired to nmos. I was expecting exactly opposite..? Anybody has got any idea ?

SMIC – Semiconductor Manufacturing International Corporation
Instances used – p18, n18
Size of Each Transistor L = 1um; W = 100 um.


Results for CMOs Inverter Circuit at 200 Hz in untis of nV/ sqrt(Hz) -

Models FlickerNoise Thermal Noise

smicPMOS 61.62 0.61
smicNMOS 16.95 1.43
 

Re: Noise Analysis

I think this is correct? For higher frequencies, the flicker noise is negligible and the noise of the transistor is dominated by thermal noise. So for most circuits, the pmos noise IS lower
 

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