I always saw some papers that showed the sensitivity curves when they used CML latch as frequency divider. I am wondering how they simulated this kind of curves.
What I can imagine is that they fixed the input frequency, swept input voltage, and then found out what the minimum voltage level to make divider work. After this, they changed to another frequency and repeated above steps until the whole frequency range was simulated.
Am I right, or there is another easier way to do it?
Thanks a lot