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[SOLVED] How to simulate the frequence response of the PLL

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jiangwp

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When we have finish a PLL design, how do we simualtion the pll with ac response.

which loop should be use for the close loop or open loop ?

If the open loop is used, where is the open point .
 

this might help you very very much

**broken link removed**

If I helped you could you please kindly click the helped me button and help me?

Thank you

Hope you have a nice day!
 

jiangwp said:
When we have finish a PLL design, how do we simualtion the pll with ac response.

which loop should be use for the close loop or open loop ?

If the open loop is used, where is the open point .

if you still have a problem send me and i will try to help you .
regards,..
 

No one will do this kind of job. Normally people use formular to calcultae the ac response of PLL. Or looking at the phase noise plot, you can guess the bandwidth and ac response.
 

You can use matlab to do it. But that is only transfer funciton analysis, not real circuits level simulation
 

I hope it can be helpful to you.
See the attached file.

if anyone can find the error, feel free to any suggeset to me.
Thanks.
Good luck to you!!!
 

you could use verilog-a or matlab for this issue
if you are trying to make your system design
and try National AN-1001 & AN-885
 

Just as a tip, you should be looking at the loop dynamics to design the pll first, not last.
 

You should model the PLL in S domain. Then you can use Matlab or Hspice to simulate the phase margin and overshoot.

VCO: Kvco/S
PFD+CP: Ip/2/π
LOOP filter: F(S) depend on your loop filter type
divier: 1/N

Yibin.
 

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