how to simulate signals in Xilinx foundation simulator

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weiwei2

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i new to this. i synthesize a 4:1 mux successfully and has the *.edf loaded into xilinx simulator, but don't know how to run the simulation

for example:
i) how to set state (state of selection signal is 2 bit, bus is shown as a single signal group in the simulator)

ii) how to run the simulation ?

please help.
or is there any detailed tutorial on this?
 

I'm Alliance user but my knoldge about about foundation is that it is supplied with modelSim which can simulat VHDL code (behavioral) for before P&R. or it take a VHDL file produced by the P&R tool accosiated with SDF file.
I did not know that it can accept .edn file
 

I am interested in this problem, for I meet similar matter. I long for knowing the resolution.
 

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