how to simulate signals in Xilinx foundation simulator

[weiwei2]

i new to this. i synthesize a 4:1 mux successfully and has the *.edf loaded into xilinx simulator, but don't know how to run the simulation

for example:
i) how to set state (state of selection signal is 2 bit, bus is shown as a single signal group in the simulator)

ii) how to run the simulation ?

please help.
or is there any detailed tutorial on this?

 

[Al Farouk]

I'm Alliance user but my knoldge about about foundation is that it is supplied with modelSim which can simulat VHDL code (behavioral) for before P&R. or it take a VHDL file produced by the P&R tool accosiated with SDF file.
I did not know that it can accept .edn file

 

[nj_jack]

I am interested in this problem, for I meet similar matter. I long for knowing the resolution.