Re: How to simulate output impedance of cascode ckt in HSPIC
Use something like this to do the measurement,
itst 0 out DC 0 AC 1
.ac dec 10 1 1G
.param twopi = 2*3.14159265358979
then measure the small-signal (ac) voltage, and compute:
Ceff = imag(1/vac(out)) / (twopi* freq)
where "freq" is any frequency of the measured ac voltage.
This is because I = Y V, where the admittance Y is the parallel combination of the effective conductance and capacitance:
Y = Geff + j w Ceff
I = 1 (AC magnitude 1 on source itst)
Thus, Y = 1/V, and imag(1/V) = imag(Y) = w Ceff, so
Ceff = imag(1/V) *1/ (2 * pi * freq)
Apply a unit current, measure the voltage developed, the imaginary component is the reactance component. The output curve shows directly the output impedance over frequency.
freq can be the -3db frequency, or the frequency where the phase delay is -45 degrees, for example.