How to simulate mix-signals circuits in Cadence?

[horzonbluz]

Who is family with the cadence mix-signals simulation?
I have simulate a mixed signal circuits with cadence spectre, but the digital part
has no result. I don't know why this happened.

 

[yibinhsieh]

Please specify the real case. Is the Verilog can't start or ??


Yibin.

 

[analog_design]

Dear horzonbluz
How to simulate a mixed signal circuits with Hspice?

 

[hanm]

Hi horzonbluz;
What's your digital part seems like? Do you write it with verilog. If this right,you should setup your digital part in "behaviral" view and run with "spectreverilog",Or you can run with spw. The process is quite similar.
Hope this helpeful.


hanm

 

[crystal]

To simulate mised-signal circuits with HSpice, you got to have VCS as well. VCS is the digital Verilog simulator.

If not mistaken, Verilog has to be the top most design, wrapping up the whole mixed-signal design. Treat the spice file as component. Check out the SOLD documentation. A few exampels given.

 

[Analog_starter]

Hi hanm,

What ' s spw? could you give me more details about it ?

Thanks,
Analog_starter

 

[Teddy]

you can not run mixed simulation with spectre (only) - you will need to run mixed signal environment - like AMS or ADMS(Mentor)
There the digital part is run in different simulator and spectre runs transisotr level or verilog-A portion.

To do this you have to create config view and use hierarchy editor to set up everything - it is kindof difficult first time.
Also you need to have translation between analog and digital world.

I recommend to ask cadence or somebody who did it before for help - not here - any advice here will not be very useful since you have to dig through it on your own anyway

 

[simov]

use SpectreVerilog or NCsim

 

[engineer]

Hi Teddy
do you know SystemVision of mentor?
I can't simulate any VHDL-AMS code I write as I find too many errors
regards