common mode input
The problem arises from the tail current source. It has such a large current value (1mA!) that forces the Vgs of the input pairs to a very large value (larger than 1.3V). Thus, the voltage at the differential input tail goes to negative.
The output stage, however, is biased by current mirrors. I guess the current is much less than 1mA if the input stage is removed from the circuit. Since the tail current source is ideal, it will always draw exactly 1mA current from the output stage. If M1 and M2 can't sources such a large current, the lower part of the output stage (M3~M10) will draw currents from vss to M5 and M6 ( and hence to I1). In this case, the output voltage becomes negative.
If you replace I1 to a mosfet current sink, the current will decrease when the input common voltage is too low. So, in this case, we don't see a negative output voltage.