Hello, All,
I am designing a 5 GHz PLL circuit using a CMOS process. This circuit has to be packaged for testing. I am wondering how to get the PLL 5 GHz clock signal out for measurement. Does it require special high speed I/O design? Thanks in advance for your assistance.
It mostly depends on your measurement equipment. Can you capture a 5GHz signal? What kind of probes do you have?
At any rate, I would use some kind of low-voltage differential signal driving a 50omh (or 75ohm) load and then a balun on the test board to make the signal single-ended.
I will use spectrum analyzer and oscilloscope to do the measurement. SMA connector is expected to be put on the test PCB board. My concern is when the PLL circuit is packaged, whether I need special high speed I/O pin for 5 GHz signal output. Is it hard to design the high frequency differential pins?
What package are you using? Have you tried to get a model from the package house and simulate your output driver with it?
Moreover, your power supply pins are as important as your signal pins, their inductance might affect the performance of your PLL and should be included in the simulations as well!