How to resolve the question of timing convergence in P&R

[harryzhu]

I'm a cad engineer but I have no more experience indeed, I met the question of timing convergence when do timing driven P&R with SE, which way should I think of and how to resilve it? Thanks for your help!

Have a good day!

Best Regards,

Harryzhu

 

[luancao]

Re: How to resolve the question of timing convergence in P&a

Generally speaking, to solve the timing problem you could:

- for HOLD time violation, you could insert additional buffer in-between by "fix_hold...";

- for SETUP time violaton, you have to work together with the design engineer. If you could solve it by changing the position of cells, that's fine. Otherwise, you could export constrain file for re-synthesis or find the path manually and ask the design engineer to synthesize it again by using a more strict contrain. After serveral interation, it will meet the timing reqirements.

It is easy to say than to do. Usually, if you know the design better in advance or the design engineer leave more margin for P&R, you life will be easier.