ttnknathan
Newbie level 4
in this fugure,if the output stage drives a low value resistance,so the scale of pmos and nmos is very big.But big scale of mos transistor deduces big quiescent.how to reduce it?Optimizing the ratio of the scale of the nmos and pmos? Or modifying the scale of M21 and M24 ?Maybe someone can suggest me another circuit to control the quiescent current?
thanks
thanks