[SOLVED] How to reduce current spike when oscillator inside?

Dear all,

In my circuit, an oscillator is inside which its oscillation freq. is 8KHz.
There are spike currents at supply voltage (VDD) when oscillator is oscillated.
My structure of oscillator is 5-stage oscillator.

How to reduce or remove the spike current at supply voltage (VDD) when oscillator is oscillated?

How to reduce or remove the spike current at supply voltage (VDD) when oscillator is oscillated?

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Well... one can write a book about such problems.
The exact recipe to follow can vary depending the rise time of your oscillator. For example, fast logic gates can have impressive rise time and a misconceived circuit may even radiate a significant amount of RF power.
So the answer will depend upon your particular circuit and of course the layout.
For the following hints, I am supposing you are dealing with discrete gates and PCBs.
A few hints can be to split the power supply rails, connect the two parts in a single node, which is kept "clean" by a generous amount of capacitive bypass. Having a clean, organized tree structure for the supply rails helps. Do not be shy on using ground planes. Place physically far the sensitive parts from the potentially noisy oscillator. And, again, decouple the power supply rails! In all the discrete circuits I build, I use a 100 nF cap near each IC.

Hope it helps!

DarwinNE said:

... In all the discrete circuits I build, I use a 100 nF cap near each IC.

Click to expand...

For an 8kHz interference, I'd suggest to add a 100..1000µF elko.

For an 8kHz interference, I'd suggest to add a 100..1000µF elko.

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I agree, but just one or two on critical nodes, for example where different branches of the power supply distribution are connected.

Hi,
on a good "organized" card/placement you need usual only 1 elektrolyt or tantal/alu with i.e. 100 uF(if your currents arent more as some 100mAmps), but more important are the thigst placed 100nf/1uFs by switched currents as Transistors & logicgates/opamps...
Very helpful is a good guided Power & GND system; these is A & O!
K.

At 8kHz you do not need much drive strength and could go
with minimum width, greater-than-minimum length FETs.
Cutting shoot-through current is your number one goal. Using
stacked FETs is another option.

Then, "float" the oscillator rails inside some resistive isolation
with local decoupling, so no switching current uses either
of the prime rails for source or return - only a quasi-DC
restoring current. A rack of low-threshold MOS caps would
do, for local decoupling - preferably the species that is in a
well, not the substrate, so you can further manage the
bottom plate & well as you see fit.

The output driver, which may see some load, you can phase-
manage the driver FETs with staggered gate drive trying
for break-before-make switching.

You will never get rid of all the spikes if they have to go off-
chip for their high-frequency current loop closure. You have
to keep them at home.