how to protect my RTL source code?

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How to encrypt synthsisiable RTL code to only behaviorable code?
so that others only could use these code to simulate it but can not synthsis it!
so far as I know , vcs support it ,use option +protect, but how about other simulator? like ModelSim ,and so on. If do,how to?
Thank you very much!
 

This is what I would do...

Write your RTL.
Synthesize it.
Imaging is a X!linx device, build it with ISE
Create a post place and route simulation model...

there are some options there like simulator you use, VHDL or Verilog and that kind of thing...

it generates a totally device specific code with lots of hdl lines, it can be simulated bloody slow and it's encrypted (it's not giving awya your RTL), just a target specific version of it.


-maestor
 

for modelsim,
you can use vcom -nodebug to do it.
good luck.
 

u can use cadence tools to pretect it
 

It only protect seeing source code.
 

Hi gaonkc,

Could you talk a bit more about those C@dence tools?

Thx,

-maestor
 

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