how to produce vhdl code using simulink?

[Tom2]

simulink to vhdl

Is anyone who have information about produce vhdl code using simulink?????

 

[snowfall]

Re: simulink to vhdl

The VHDL source generated from Simulink is only in structural format, i.e., it's not in the behaviral one that allows easy reading. Before you can even do that, you must convert your design to a set of available fixed/floating point library functions then re-simulate your design to make sure that it still meets the overall requirement. After that you can convert the design to either VHDL/Verilog.
Cheers,
-s

 

[Tom2]

Re: simulink to vhdl

Can you be more specific how can i do this.If you have any tutorial or an example will be very helpful.

 

[snowfall]

Re: simulink to vhdl

U should checkout the latest Matlab release which includes the Simulink HDL Coder that has the examples/tutorial material. Depending on what you have now or if u start a new project and so on. If you start a new one, you can look through the available library set of functions and work from there.
-s

 

[haneet]

Re: simulink to vhdl

guyz it can be used but i feel the code generated is not synthesizable..
please correct me if i am wrong..

 

[umar_alzoubi]

Re: simulink to vhdl

try the link :
www.mathworks.com
search for the topic you will a lot of info

 

[jacocobi]

simulink to vhdl

Ahh...ach so!