sanlang
Newbie level 1
When we increase the switching frequency, result in increase of switch loss if we keep the same size powerfet.
By reducing the powerfet to reduce the switching loss, which will increase the Rds_on of powerfet ,result in the increase of conduction loss.
My question : Is there any formular to optimize effeciency between the switching freqency and powerfet ( or other factor I didn't mention here)
Thanks!
By reducing the powerfet to reduce the switching loss, which will increase the Rds_on of powerfet ,result in the increase of conduction loss.
My question : Is there any formular to optimize effeciency between the switching freqency and powerfet ( or other factor I didn't mention here)
Thanks!