How to measure the PSRR of the VCO?

[sivan_75]

Can you tell me how to measure the PSRR of the VCO? Also how can we measure the jitter in the VCO with respect to the supply ripples or supply noise?

 

[saro_k_82]

phase noise psrr

Apply a sine wave at the frequency of PLL BW of specified amplitude on the VCO supply. Plot the variation in frequency. This will be of the same period as the supply disturbance, but with a phase delay. Integrate one half of the period of this waveform (excess frequency) to get the phase error. Convert this phase noise to jitter.

 

[sivan_75]

psrr pll

Actually i am giving a sine wave of 1MHz frequency with the DC voltage of 1.8V. The amplitude of the sine wave is +/- 50mV. How do i plot the frequency with respect to supply? Do i have to measure manually at 1.8+50mV 1.8V and 1.8-50mV?

 

[saro_k_82]

pll psrr

Use the "freq" function in the calculator

 

[AdvaRes]

vco and psrr

Actually i am giving a sine wave of 1MHz frequency with the DC voltage of 1.8V. The amplitude of the sine wave is +/- 50mV. How do i plot the frequency with respect to supply? Do i have to measure manually at 1.8+50mV 1.8V and 1.8-50mV?

Set your vdc power supply as a variable Vc in the schematic, then add it to the ADE variable editor window. While filling the fields of the pss simulation choose Vc as variable. So you dont have to do that manualy.

The problem is when you have more than one sweep variables (ie temperature and vdc or Vtune). I hope some expert tell as how to overcome this problem.

 

[sivan_75]

psrr voltage controlled oscillator

Thanks for your response. I am little bit confused with the calculation of the jitter due to the ripples in the power supply. Can i run PSS and Pnoise analysis to measure that?

 

[sivan_75]

vco supply filter

What is the exact definition of PSRR for VCO? Is it the ratio of change of output frequency and the change of supply voltage?. In that case, the unit will be Hz/V.Is it right? How can you calculate in dBs? If some one answers, that would be fine.

 

[saro_k_82]

psrr for pll

What is the exact definition of PSRR for VCO? Is it the ratio of change of output frequency and the change of supply voltage?. In that case, the unit will be Hz/V.Is it right? How can you calculate in dBs? If some one answers, that would be fine.

The variation in VCO frequency for a change in supply voltage is called Supply pushing and expressed in Hz/V. If the PLL is expected to provide clock to a data converter, then writing this in terms of jitter addition will make sense where it takes the unit of ps. If you have a specific frequency at the power line to be worried about, then if you run a transient with that noise on the supply and plot the dft, you can infer that the frequency spur due to the supply noise is below the carrier by so much dB where it takes the unit of dBc.

 

[mouzid]

vco supply pushing

What is the exact definition of PSRR for VCO? Is it the ratio of change of output frequency and the change of supply voltage?. In that case, the unit will be Hz/V.Is it right? How can you calculate in dBs? If some one answers, that would be fine.

The variation in VCO frequency for a change in supply voltage is called Supply pushing and expressed in Hz/V. If the PLL is expected to provide clock to a data converter, then writing this in terms of jitter addition will make sense where it takes the unit of ps. If you have a specific frequency at the power line to be worried about, then if you run a transient with that noise on the supply and plot the dft, you can infer that the frequency spur due to the supply noise is below the carrier by so much dB where it takes the unit of dBc.

Hi Edaboarders,

I'm performing the phase noise simulation using the technique described by saro_k_82.
I have two basic questions and I hope you help me :

1- While simulating the phase noise of the differents components (cp, pfd, vco ...), do I have to connect the output to a 50 ohm resistor for matching ?

In fact first simulation gave me a high phase noise.For exemple, the figure below is the simulated phase noise of the CP+filter. Its about -35 dbc/Hz at 1 Mhz. When I use the 50 ohm resistor it becomes -90 dbc/Hz at 1 Mhz.

2- Let suppose I have simulated the phase noise of the pfd, cp+filter, VCO and the frequency detector. How can I plot the total PLL phase noise using the calculator ?

I'll donate 100pt for help.

Thanks in advance.

 

[fanatic]

psrr vco

Apply a sine wave at the frequency of PLL BW of specified amplitude on the VCO supply. Plot the variation in frequency. This will be of the same period as the supply disturbance, but with a phase delay. Integrate one half of the period of this waveform (excess frequency) to get the phase error. Convert this phase noise to jitter.

hi, i have a question that why do u make a assumption that supply noise frequency is around PLL BW ? I mean if wo don't consider the low pass function of pll