How to measure the PLL pull in range using Cadence?

[samiscool]

Dear all,

Im currently working on a PLL (phase lock loop) project and i would like to ask how do i measure the PLL pull in range using a simulator software called Cadence.

I would like to know :
1. What are my measure points (input output).
2. What are the measure procedures needed (something like a lab procedure).
3. What is the measured unit?( should it be in freq unit or just a range)

Thanks......

Your help is deeply appreciated.

 

[flatulent]

pull in range

Put different frequencies in one at a time starting at the free running VCO frequency and going higher and lower.

The pull in range will be the difference between the largest higher and lower frequency that produces lock in the allotted time.

You measure lock conditions by looking at the VCO input transient and noting when steady state constant voltage is achieved.

 

[samiscool]

pull in range pll

Im wondering when u say vary in frequency, are you reffering to the reference frequency or the feedback frequency?

This is because the circuit that i have now, currently has a phase detector, going through a charge pump circuit then to a loop filter then to a current control oscillator and lastly a buffer. Lastly feeding it back to the phase detector.

Thanks again for the reply =)

 

[LvW]

pll pull in range

Dear all,
Im currently working on a PLL (phase lock loop) project and i would like to ask how do i measure the PLL pull in range using a simulator software called Cadence.
...........

1.) The pull-in range is the maximum allowable frequency difference between reference and VCO frequency for which the loop is still able to acquire lock.
(This can be a rather long time)

2.) To measure this range you have to go through a "trial and error"-procedure, that means: start with an incoming ref. frequency, and when lock can be achieved you have to increase the frequency difference, and so on.....

3.) As proposed by FLATULENT it is best to watch the VCO control voltage to see if and when the PLL has locked.

 

[samiscool]

lock-in range pll

I would like to thank you for the information, now im waiting for the confirmation from the supervisors.

If its correct, ill do a write up on full PLL details for the benefit of the board.

Added after 45 minutes:

This is currently a new measurement given by my supervisor.

To simulate AC response on loop filter for PLL using
a. input AC current.
b. output AC voltage.

Does this mean i have to obtained the phase and gain using both of this inputs?

I find this weird coz from my previous experience .......gain = Vout/Vin but using input AC current?

 

[LvW]

pull-in lock-in

I suppose your phase detector is a charged pump type.
In this case, the input to the filter is indeed a current.