How to manually toggle SPI CS of Raspberry Pi?

[emaq]

How to manually toggle the chip select of Raspberry Pi 3 SPI in the following code?
My objective is to call transfer() twice for 16-bit transaction.

int
SPI::transfer(uint8_t *send, uint8_t *recv, unsigned len)
{
    if ((send == nullptr) && (recv == nullptr)) {
        return -EINVAL;
    }

    // set write mode of SPI
    int result = ::ioctl(_fd, SPI_IOC_WR_MODE, &_mode);

    if (result == -1) {
        PX4_ERR("can’t set spi mode");
        return PX4_ERROR;
    }

    spi_ioc_transfer spi_transfer{};

    spi_transfer.tx_buf = (uint64_t)send;
    spi_transfer.rx_buf = (uint64_t)recv;
    spi_transfer.len = len;
    spi_transfer.speed_hz = _frequency;
    spi_transfer.bits_per_word = 8;

    result = ::ioctl(_fd, SPI_IOC_MESSAGE(1), &spi_transfer);

    if (result != (int)len) {
        PX4_ERR("write failed. Reported %d bytes written (%s)", result, strerror(errno));
        return PX4_ERROR;
    }

 

[KlausST]

Hi,

Is the CS conneted directly to an RPi port pin? (or via external circuitry)

If connected to a port:
* How is the port pin defined? As GPIO or as dedicated SPI_hardware_controlled_CS pin?

Klaus

 

[emaq]

Hi,

Is the CS conneted directly to an RPi port pin? (or via external circuitry)

If connected to a port:
* How is the port pin defined? As GPIO or as dedicated SPI_hardware_controlled_CS pin?

Klaus

CS defined as dedicated SPI_hardware_controlled_CS pin.

 

[KlausST]

Hi,

then I expect it to work without additional coding.

What happens? Do you have a scope to check function?

Klaus

 

[emaq]

Hi,

then I expect it to work without additional coding.

What happens? Do you have a scope to check function?

Klaus

It worked... the correct sequence is to send 2 consecutive bytes and after that receive 2 bytes.
Thanks.

 

[Aussie Susan]

Using the internally controlled CS signal from any hardware SPI module is notoriously difficult. Generally you nede to keep the input buffer full (or at least not empty) for the hardware to think that all bytes are part of the same 'message' and not toggle the CS signal after each byte.
Sending 2 bytes and then receiving 2 bytes will work in your case as you are probably dealing with hardware that has a FIFO that is larger (often 4 or 8 bytes). However this is not a good 'general' approach. When you need to exchange longer messages, you probably il need to go to a scheme where you either use interrupts or monitor the module status flags to 1) keep the Tx buffer full (to keep the CS signal in the required state) and 2) clear the Rx buffer so you don't get overflows.
Susan