How to make the sub power domain and top power domain using same vss vdd

[themanh246]

Hi! I am a newbie in physical design. Recently, i downloaded i2c project from opencores to learning how to use fusion compiler. After i compiled PG std rail, i shown all my cell from a sub module is violated, it short VSS/VDD rail to cell's VSS/VDD. I did make an UPF file and create a power domain for those sub module and made its primary power and ground is VDD and VSS, but it still shown short.
I don't know where is the problem. Pls help me
Thank you very much

 

[ThisIsNotSam]

not sure I understood the issue. You have 3 power domains that actually connect to the same VDD/VSS? If so, the short reported by the tool is a disconnect between what you are telling it and what you meant to do.