Nik Zhafran
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- 134
Org 00H
data_one equ P3
data_ten equ P2
Mynumber Equ 30H
main_prog:
MOV data_ten,#0C0H
MOV data_one,#0c0H
mov Mynumber,#0
mov p1,#0 ;set port 1 as input
JB P1.0,up_A
JB P1.1,stop_A
sjmp main_prog
up_A: mov a, Mynumber
Cjne A,#99, up
mov Mynumber,#0FFH
sjmp up
stop_A: mov a, Mynumber
Cjne A,#0, stop
mov Mynumber,#99H
sjmp stop
up: inc Mynumber
JB P1.1,stop
Call BCD
call delay
mov a, Mynumber
Cjne A,#99, up
mov Mynumber,#0FFH
SJMP main_prog
stop: dec Mynumber
JB P1.0,up
Call BCD
call delay
mov a, Mynumber
Cjne A,#00, stop
mov Mynumber,#100
SJMP main_prog
BCD: Mov A,Mynumber
Mov B,#10
Div AB
call Seg_conv
mov data_ten, A
mov A,B
call Seg_conv
mov data_one, A
Ret
Seg_conv: inc A
Movc A, @A+PC
RET
DB 0C0H ; 0
DB 0F9H ; 1
DB 0A4H ; 2
DB 0B0H ; 3
DB 099H ; 4
DB 092H ; 5
DB 082H ; 6
DB 0F8H ; 7
DB 080H ; 8
DB 090H ; 9
delay: MOV R5,#0ffh
MOV R6,#0ffH
MOV R7,#2
delay_loop: DJNZ R5,delay_loop
DJNZ R6,delay_loop
DJNZ R7,delay_loop
RET
END
for circuit: connect pin 31 to vcc. reset circuit is not correct. change resistor and capacitor position.
capacitor -ve should be connected to pin 9 from Vcc and resistor is connected to pin 9 from ground.
- - - Updated - - -
step1: initialise i/p and o/p
step2: wait till inc or dec switch pressed
step3: if inc pressed( logic 0 to micro controller) wait till it becomes 1 again (i.e till switch released). increment 'mynumber'. if 'mynumber' is 100, change 'mynumber' to zero. transfer data to seven segment. go to step2.
step4: else if dec pressed, wait till it becomes 1 again. if 'mynumber' is zero change it to 99 else decrement 'mynumber'. transfer data to seven segment. jump to step 2.
rewrite your code according to above format.
Org 00H
button equ 0FF28H
data_one equ P3
data_ten equ P2
mov p0,#40h ;show 0
mov mainCount,#0
Mynumber Equ 30H
main_prog:
MOV data_ten,#0C0H
MOV data_one,#0c0H
mov Mynumber,#0
mov p1,#0 ;set port 1 as input
JB P1.0,up_A
JB P1.1,stop_A
sjmp main_prog
mainloop:
jb p1.0,checkdown
call incRoutine
checkdown:
jb p1.1,display
call decRoutine
display:
call displayRoutine
sjmp mainloop
incRoutine:
inc mainCount
waitInc:
jnb p1.0, waitInc
ret
decRoutine:
dec mainCount
waitdec:
jnb p1.1, waitdec
ret
up_A: mov a, Mynumber
Cjne A,#99, up
mov Mynumber,#0FFH
sjmp waitInc
stop_A: mov a, Mynumber
Cjne A,#0, stop
mov Mynumber,#99H
sjmp waitInc
up: inc Mynumber
JB P1.1,stop
Call BCD
call delay
mov a, Mynumber
Cjne A,#99, up
mov Mynumber,#0FFH
SJMP main_prog
stop: dec Mynumber
JB P1.0,up
Call BCD
call delay
mov a, Mynumber
Cjne A,#00, stop
mov Mynumber,#100
SJMP main_prog
BCD: Mov A,Mynumber
Mov B,#10
Div AB
call Seg_conv
mov data_ten, A
mov A,B
call Seg_conv
mov data_one, A
Ret
Seg_conv: inc A
Movc A, @A+PC
RET
DB 0C0H ; 0
DB 0F9H ; 1
DB 0A4H ; 2
DB 0B0H ; 3
DB 099H ; 4
DB 092H ; 5
DB 082H ; 6
DB 0F8H ; 7
DB 080H ; 8
DB 090H ; 9
delay: MOV R5,#0ffh
MOV R6,#0ffH
MOV R7,#2
delay_loop: DJNZ R5,delay_loop
DJNZ R6,delay_loop
DJNZ R7,delay_loop
RET
END
Org 00H
data_one equ P3
data_ten equ P2
IPIN EQU P1.0
DPIN EQU P1.1
Mynumber Equ 30H
main_prog:
CALL INIT
AGAIN:
AG2: JB IPIN,AG1
CALL DELAY1 ;debounce
JB IPIN,AG1
JNB IPIN,$ ;wait till switch release
INC MYNUMBER
mov a,mynumber
cjne a,#100,pq1
mov mynumber,#0
pq1:
call bcd ;diaplay data
AG1: JB DPIN,AG2
CALL DELAY1
JB DPIN,AG2
JNB DPIN,$
dec mynumber
mov a,mynumber
cjne a,#255,pq2
mov mynumber,#99
pq2:
call bcd
JMP AGAIN
INIT:
MOV data_ten,#0C0H
MOV data_one,#0c0H
mov Mynumber,#0
mov p1,#255 ;set port 1 as input BY . IT SHOULD BE 1
RET
DELAY1: MOV R4,#255
DJNZ R4,$
RET
BCD: Mov A,Mynumber
Mov B,#10
Div AB
movc dptr,#seg_conv
MOVC A,@A+DPTR ; MOVE DATA @A+DPTR IN A
mov data_ten, A
mov A,B
movc dptr,#seg_conv
MOVC A,@A+DPTR ; MOVE DATA @A+DPTR IN A
mov data_one, A
Ret
delay: MOV R5,#0ffh
MOV R6,#0ffH
MOV R7,#2
delay_loop: DJNZ R5,delay_loop
DJNZ R6,delay_loop
DJNZ R7,delay_loop
RET
Seg_conv:
DB 0C0H ; 0
DB 0F9H ; 1
DB 0A4H ; 2
DB 0B0H ; 3
DB 099H ; 4
DB 092H ; 5
DB 082H ; 6
DB 0F8H ; 7
DB 080H ; 8
DB 090H ; 9
END
Code C - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 char counter = 0, units, tens; char ca_mask[] = {0xC0, 0xF9, 0xA4, 0xB0, 0x99, 0x92, 0x82, 0xF8, 0x80, 0x90}; #define SSD_DATA_PORT P2 void main() { P0 = 0x00; P1 = 0x03; P2 = 0x00; P3 = 0x00; Delay_ms(1000); P2 = 0xFF; P1_2_bit = 1; P1_3_bit = 1; while(1) { tens = counter / 10; units = counter % 10; SSD_DATA_PORT = ca_mask[tens]; P1_2_bit = 0; Delay_ms(10); P1_2_bit = 1; SSD_DATA_PORT = ca_mask[units]; P1_3_bit = 0; Delay_ms(10); P1_3_bit = 1; if(!P1_0_bit) { Delay_ms(50); while(!P1_0_bit); if(counter < 99)++counter; } if(!P1_1_bit) { Delay_ms(50); while(!P1_1_bit); if(counter > 0)--counter; } } }
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 _main: MOV SP+0, #128 ;ssd.c,6 :: void main() { ;ssd.c,8 :: P0 = 0x00; MOV P0+0, #0 ;ssd.c,9 :: P1 = 0x03; MOV P1+0, #3 ;ssd.c,10 :: P2 = 0x00; MOV P2+0, #0 ;ssd.c,11 :: P3 = 0x00; MOV P3+0, #0 ;ssd.c,13 :: Delay_ms(1000); MOV R5, 8 MOV R6, 1 MOV R7, 245 DJNZ R7, DJNZ R6, DJNZ R5, NOP ;ssd.c,14 :: P2 = 0xFF; MOV P2+0, #255 ;ssd.c,15 :: P1_2_bit = 1; SETB P1_2_bit+0 ;ssd.c,16 :: P1_3_bit = 1; SETB P1_3_bit+0 ;ssd.c,18 :: while(1) { L_main0: ;ssd.c,20 :: tens = counter / 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV R0, A MOV _tens+0, 0 ;ssd.c,21 :: units = counter % 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV A, B+0 MOV R0, A MOV _units+0, 0 ;ssd.c,23 :: SSD_DATA_PORT = ca_mask[tens]; MOV A, #_ca_mask+0 ADD A, _tens+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,24 :: P1_2_bit = 0; CLR P1_2_bit+0 ;ssd.c,25 :: Delay_ms(10); MOV R6, 18 MOV R7, 237 DJNZ R7, DJNZ R6, ;ssd.c,26 :: P1_2_bit = 1; SETB P1_2_bit+0 ;ssd.c,28 :: SSD_DATA_PORT = ca_mask[units]; MOV A, #_ca_mask+0 ADD A, _units+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,29 :: P1_3_bit = 0; CLR P1_3_bit+0 ;ssd.c,30 :: Delay_ms(10); MOV R6, 18 MOV R7, 237 DJNZ R7, DJNZ R6, ;ssd.c,31 :: P1_3_bit = 1; SETB P1_3_bit+0 ;ssd.c,33 :: if(!P1_0_bit) { JB P1_0_bit+0, L_main2 NOP ;ssd.c,34 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,35 :: while(!P1_0_bit); L_main3: JB P1_0_bit+0, L_main4 NOP SJMP L_main3 L_main4: ;ssd.c,36 :: if(counter < 99)++counter; CLR C MOV A, _counter+0 SUBB A, #99 JNC L_main5 INC _counter+0 L_main5: ;ssd.c,37 :: } L_main2: ;ssd.c,39 :: if(!P1_1_bit) { JB P1_1_bit+0, L_main6 NOP ;ssd.c,40 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,41 :: while(!P1_1_bit); L_main7: JB P1_1_bit+0, L_main8 NOP SJMP L_main7 L_main8: ;ssd.c,42 :: if(counter > 0)--counter; SETB C MOV A, _counter+0 SUBB A, #0 JC L_main9 DEC _counter+0 L_main9: ;ssd.c,43 :: } L_main6: ;ssd.c,45 :: } LJMP L_main0 ;ssd.c,46 :: } SJMP #254 ; end of _main
This is the circuit you have to use. It uses multiplexing for 7 Segments. I will soon post a c code and a compiler generated asm code. You make the asm code from it.
- - - Updated - - -
Here is working C code which I made. It doesn't use INTx for buttons and Timer interrupts for & Segment displaying. As there is debounce delay for buttons you see flickering when button pressed. If you want flicker free display then I will write one which uses INTx pins for buttons and Timer interrupt for 7 Segment displaying.
mikroC PRO 8051 C Code
Code C - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 char counter = 0, units, tens; char ca_mask[] = {0xC0, 0xF9, 0xA4, 0xB0, 0x99, 0x92, 0x82, 0xF8, 0x80, 0x90}; #define SSD_DATA_PORT P2 void main() { P0 = 0x00; P1 = 0x03; P2 = 0x00; P3 = 0x00; Delay_ms(1000); P2 = 0xFF; P1_2_bit = 1; P1_3_bit = 1; while(1) { tens = counter / 10; units = counter % 10; SSD_DATA_PORT = ca_mask[tens]; P1_2_bit = 0; Delay_ms(10); P1_2_bit = 1; SSD_DATA_PORT = ca_mask[units]; P1_3_bit = 0; Delay_ms(10); P1_3_bit = 1; if(!P1_0_bit) { Delay_ms(50); while(!P1_0_bit); if(counter < 99)++counter; } if(!P1_1_bit) { Delay_ms(50); while(!P1_1_bit); if(counter > 0)--counter; } } }
mikroC PRO 8051 generated assembly code.
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 _main: MOV SP+0, #128 ;ssd.c,6 :: void main() { ;ssd.c,8 :: P0 = 0x00; MOV P0+0, #0 ;ssd.c,9 :: P1 = 0x03; MOV P1+0, #3 ;ssd.c,10 :: P2 = 0x00; MOV P2+0, #0 ;ssd.c,11 :: P3 = 0x00; MOV P3+0, #0 ;ssd.c,13 :: Delay_ms(1000); MOV R5, 8 MOV R6, 1 MOV R7, 245 DJNZ R7, DJNZ R6, DJNZ R5, NOP ;ssd.c,14 :: P2 = 0xFF; MOV P2+0, #255 ;ssd.c,15 :: P1_2_bit = 1; SETB P1_2_bit+0 ;ssd.c,16 :: P1_3_bit = 1; SETB P1_3_bit+0 ;ssd.c,18 :: while(1) { L_main0: ;ssd.c,20 :: tens = counter / 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV R0, A MOV _tens+0, 0 ;ssd.c,21 :: units = counter % 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV A, B+0 MOV R0, A MOV _units+0, 0 ;ssd.c,23 :: SSD_DATA_PORT = ca_mask[tens]; MOV A, #_ca_mask+0 ADD A, _tens+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,24 :: P1_2_bit = 0; CLR P1_2_bit+0 ;ssd.c,25 :: Delay_ms(10); MOV R6, 18 MOV R7, 237 DJNZ R7, DJNZ R6, ;ssd.c,26 :: P1_2_bit = 1; SETB P1_2_bit+0 ;ssd.c,28 :: SSD_DATA_PORT = ca_mask[units]; MOV A, #_ca_mask+0 ADD A, _units+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,29 :: P1_3_bit = 0; CLR P1_3_bit+0 ;ssd.c,30 :: Delay_ms(10); MOV R6, 18 MOV R7, 237 DJNZ R7, DJNZ R6, ;ssd.c,31 :: P1_3_bit = 1; SETB P1_3_bit+0 ;ssd.c,33 :: if(!P1_0_bit) { JB P1_0_bit+0, L_main2 NOP ;ssd.c,34 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,35 :: while(!P1_0_bit); L_main3: JB P1_0_bit+0, L_main4 NOP SJMP L_main3 L_main4: ;ssd.c,36 :: if(counter < 99)++counter; CLR C MOV A, _counter+0 SUBB A, #99 JNC L_main5 INC _counter+0 L_main5: ;ssd.c,37 :: } L_main2: ;ssd.c,39 :: if(!P1_1_bit) { JB P1_1_bit+0, L_main6 NOP ;ssd.c,40 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,41 :: while(!P1_1_bit); L_main7: JB P1_1_bit+0, L_main8 NOP SJMP L_main7 L_main8: ;ssd.c,42 :: if(counter > 0)--counter; SETB C MOV A, _counter+0 SUBB A, #0 JC L_main9 DEC _counter+0 L_main9: ;ssd.c,43 :: } L_main6: ;ssd.c,45 :: } LJMP L_main0 ;ssd.c,46 :: } SJMP #254 ; end of _main
Code C - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 char counter = 0, units, tens; char ca_mask[] = {0xC0, 0xF9, 0xA4, 0xB0, 0x99, 0x92, 0x82, 0xF8, 0x80, 0x90}; #define SSD_DATA_PORT_UNITS P3 #define SSD_DATA_PORT_TENS P2 void main() { P0 = 0x00; P1 = 0x03; P2 = 0x00; P3 = 0x00; Delay_ms(1000); P2 = 0xFF; while(1) { tens = counter / 10; units = counter % 10; SSD_DATA_PORT_UNITS = ca_mask[units]; SSD_DATA_PORT_TENS = ca_mask[tens]; if(!P1_0_bit) { Delay_ms(50); while(!P1_0_bit); if(counter < 99)++counter; } if(!P1_1_bit) { Delay_ms(50); while(!P1_1_bit); if(counter > 0)--counter; } } }
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 _main: MOV SP+0, #128 ;ssd.c,7 :: void main() { ;ssd.c,9 :: P0 = 0x00; MOV P0+0, #0 ;ssd.c,10 :: P1 = 0x03; MOV P1+0, #3 ;ssd.c,11 :: P2 = 0x00; MOV P2+0, #0 ;ssd.c,12 :: P3 = 0x00; MOV P3+0, #0 ;ssd.c,14 :: Delay_ms(1000); MOV R5, 8 MOV R6, 1 MOV R7, 245 DJNZ R7, DJNZ R6, DJNZ R5, NOP ;ssd.c,15 :: P2 = 0xFF; MOV P2+0, #255 ;ssd.c,17 :: while(1) { L_main0: ;ssd.c,19 :: tens = counter / 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV R0, A MOV _tens+0, 0 ;ssd.c,20 :: units = counter % 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV A, B+0 MOV R0, A MOV _units+0, 0 ;ssd.c,22 :: SSD_DATA_PORT_UNITS = ca_mask[units]; MOV A, #_ca_mask+0 ADD A, R0 MOV R0, A MOV P3+0, @R0 ;ssd.c,23 :: SSD_DATA_PORT_TENS = ca_mask[tens]; MOV A, #_ca_mask+0 ADD A, _tens+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,25 :: if(!P1_0_bit) { JB P1_0_bit+0, L_main2 NOP ;ssd.c,26 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,27 :: while(!P1_0_bit); L_main3: JB P1_0_bit+0, L_main4 NOP SJMP L_main3 L_main4: ;ssd.c,28 :: if(counter < 99)++counter; CLR C MOV A, _counter+0 SUBB A, #99 JNC L_main5 INC _counter+0 L_main5: ;ssd.c,29 :: } L_main2: ;ssd.c,31 :: if(!P1_1_bit) { JB P1_1_bit+0, L_main6 NOP ;ssd.c,32 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,33 :: while(!P1_1_bit); L_main7: JB P1_1_bit+0, L_main8 NOP SJMP L_main7 L_main8: ;ssd.c,34 :: if(counter > 0)--counter; SETB C MOV A, _counter+0 SUBB A, #0 JC L_main9 DEC _counter+0 L_main9: ;ssd.c,35 :: } L_main6: ;ssd.c,37 :: } SJMP L_main0 ;ssd.c,38 :: } SJMP #254 ; end of _main
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 ; LST file generated by mikroListExporter - v.2.0 ; Date/Time: 2/25/2015 4:15:17 PM ;---------------------------------------------- ;Address Opcode ASM 0x0000 0x02002E LJMP 46 0x0003 0x020000 LJMP 0 0x0006 0x00 NOP 0x0007 0x00 NOP 0x0008 0x00 NOP 0x0009 0x00 NOP 0x000A 0x00 NOP 0x000B 0x020000 LJMP 0 0x000E 0x00 NOP 0x000F 0x00 NOP 0x0010 0x00 NOP 0x0011 0x00 NOP 0x0012 0x00 NOP 0x0013 0x020000 LJMP 0 0x0016 0x00 NOP 0x0017 0x00 NOP 0x0018 0x00 NOP 0x0019 0x00 NOP 0x001A 0x00 NOP 0x001B 0x020000 LJMP 0 0x001E 0x00 NOP 0x001F 0x00 NOP 0x0020 0x00 NOP 0x0021 0x00 NOP 0x0022 0x00 NOP 0x0023 0x020000 LJMP 0 ___CC2D: ;__Lib_System.c,13 :: ;__Lib_System.c,15 :: _CC2D_Loop1: ;__Lib_System.c,16 :: 0x0026 0xE4 CLR A ;__Lib_System.c,17 :: 0x0027 0x93 MOVC A, @A+DPTR ;__Lib_System.c,18 :: 0x0028 0xF6 MOV @R0, A ;__Lib_System.c,19 :: 0x0029 0x08 INC R0 ;__Lib_System.c,20 :: 0x002A 0xA3 INC DPTR ;__Lib_System.c,21 :: 0x002B 0xD9F9 DJNZ R1, _CC2D_Loop1 ;__Lib_System.c,23 :: 0x002D 0x22 RET ; end of ___CC2D _main: 0x002E 0x75813B MOV SP, #59 0x0031 0x1200B4 LCALL 180 ;ssd.c,7 :: void main() { ;ssd.c,9 :: P0 = 0x00; 0x0034 0x758000 MOV P0, #0 ;ssd.c,10 :: P1 = 0x03; 0x0037 0x759003 MOV P1, #3 ;ssd.c,11 :: P2 = 0x00; 0x003A 0x75A000 MOV P2, #0 ;ssd.c,12 :: P3 = 0x00; 0x003D 0x75B000 MOV P3, #0 ;ssd.c,14 :: Delay_ms(1000); 0x0040 0x7D08 MOV R5, 8 0x0042 0x7E01 MOV R6, 1 0x0044 0x7FF5 MOV R7, 245 0x0046 0xDFFE DJNZ R7, PC-2 0x0048 0xDEFC DJNZ R6, PC-4 0x004A 0xDDFA DJNZ R5, PC-6 0x004C 0x00 NOP ;ssd.c,15 :: P2 = 0xFF; 0x004D 0x75A0FF MOV P2, #255 ;ssd.c,17 :: while(1) { L_main0: ;ssd.c,19 :: tens = counter / 10; 0x0050 0x75F00A MOV B, #10 0x0053 0xE53A MOV A, _counter 0x0055 0x84 DIV AB 0x0056 0xF8 MOV R0, A 0x0057 0x850009 MOV _tens, 0 ;ssd.c,20 :: units = counter % 10; 0x005A 0x75F00A MOV B, #10 0x005D 0xE53A MOV A, _counter 0x005F 0x84 DIV AB 0x0060 0xE5F0 MOV A, B 0x0062 0xF8 MOV R0, A 0x0063 0x850008 MOV _units, 0 ;ssd.c,22 :: SSD_DATA_PORT_UNITS = ca_mask[units]; 0x0066 0x7430 MOV A, lo_addr(_ca_mask) 0x0068 0x28 ADD A, R0 0x0069 0xF8 MOV R0, A 0x006A 0x86B0 MOV P3, @R0 ;ssd.c,23 :: SSD_DATA_PORT_TENS = ca_mask[tens]; 0x006C 0x7430 MOV A, lo_addr(_ca_mask) 0x006E 0x2509 ADD A, _tens 0x0070 0xF8 MOV R0, A 0x0071 0x86A0 MOV P2, @R0 ;ssd.c,25 :: if(!P1_0_bit) { 0x0073 0x209016 JB P1_0_bit, L_main2 ;ssd.c,26 :: Delay_ms(50); 0x0076 0x7E5A MOV R6, 90 0x0078 0x7FA5 MOV R7, 165 0x007A 0xDFFE DJNZ R7, PC-2 0x007C 0xDEFC DJNZ R6, PC-4 ;ssd.c,27 :: while(!P1_0_bit); L_main3: 0x007E 0x209002 JB P1_0_bit, L_main4 0x0081 0x80FB SJMP L_main3 L_main4: ;ssd.c,28 :: if(counter < 99)++counter; 0x0083 0xC3 CLR C 0x0084 0xE53A MOV A, _counter 0x0086 0x9463 SUBB A, #99 0x0088 0x5002 JNC L_main5 0x008A 0x053A INC _counter L_main5: ;ssd.c,29 :: } L_main2: ;ssd.c,31 :: if(!P1_1_bit) { 0x008C 0x209116 JB P1_1_bit, L_main6 ;ssd.c,32 :: Delay_ms(50); 0x008F 0x7E5A MOV R6, 90 0x0091 0x7FA5 MOV R7, 165 0x0093 0xDFFE DJNZ R7, PC-2 0x0095 0xDEFC DJNZ R6, PC-4 ;ssd.c,33 :: while(!P1_1_bit); L_main7: 0x0097 0x209102 JB P1_1_bit, L_main8 0x009A 0x80FB SJMP L_main7 L_main8: ;ssd.c,34 :: if(counter > 0)--counter; 0x009C 0xD3 SETB C 0x009D 0xE53A MOV A, _counter 0x009F 0x9400 SUBB A, #0 0x00A1 0x4002 JC L_main9 0x00A3 0x153A DEC _counter L_main9: ;ssd.c,35 :: } L_main6: ;ssd.c,37 :: } 0x00A5 0x80A9 SJMP L_main0 ;ssd.c,38 :: } 0x00A7 0x80FE SJMP #254 ; end of _main 0x00B4 0x7830 MOV R0, 48 0x00B6 0x790B MOV R1, 11 0x00B8 0x7582A9 MOV DPL, 169 0x00BB 0x758300 MOV DPH, 0 0x00BE 0x120026 LCALL 38 0x00C1 0x22 RET ;ssd.c,0 :: ?ICS_ca_mask 0x00A9 0xC0F9A4 ;?ICS_ca_mask+0 0x00AC 0xB09992 ;?ICS_ca_mask+3 0x00AF 0x82F880 ;?ICS_ca_mask+6 0x00B2 0x90 ;?ICS_ca_mask+9 ; end of ?ICS_ca_mask ;ssd.c,0 :: ?ICS_counter 0x00B3 0x00 ;?ICS_counter+0 ; end of ?ICS_counter Symbol List: //** Routines locations ** //ADDRESS SIZE PROCEDURE //---------------------------------------------- 0x0026 [8] ___CC2D 0x002E [123] _main //** Variables locations ** //ADDRESS SIZE VARIABLE //---------------------------------------------- 0x0000 [1] R0 0x0001 [1] R1 0x0002 [1] R2 0x0003 [1] R3 0x0004 [1] R4 0x0005 [1] R5 0x0006 [1] R6 0x0007 [1] R7 0x0008 [1] _units 0x0009 [1] _tens 0x0030 [10] _ca_mask 0x003A [1] _counter 0x0080 [1] P0 0x0080 [0] P0_6_bit 0x0080 [0] P0_5_bit 0x0080 [0] P0_0_bit 0x0080 [0] P0_1_bit 0x0080 [0] P0_2_bit 0x0080 [0] P0_3_bit 0x0080 [0] P0_4_bit 0x0080 [0] P0_7_bit 0x0081 [1] SP 0x0082 [1] DPL 0x0082 [2] DPTR 0x0082 [1] DP0L 0x0083 [1] DPH 0x0083 [1] DP0H 0x0084 [1] DP1L 0x0085 [1] DP1H 0x0087 [0] SMOD_bit 0x0087 [0] GF1_bit 0x0087 [1] PCON 0x0087 [0] PD_bit 0x0087 [0] IDL_bit 0x0087 [0] GF0_bit 0x0088 [0] IT1_bit 0x0088 [0] TF1_bit 0x0088 [0] TR0_bit 0x0088 [0] IE1_bit 0x0088 [0] TF0_bit 0x0088 [0] TR1_bit 0x0088 [1] TCON 0x0088 [0] IT0_bit 0x0088 [0] IE0_bit 0x0089 [0] M11_bit 0x0089 [0] C_T1_bit 0x0089 [0] GATE1_bit 0x0089 [0] M01_bit 0x0089 [0] M00_bit 0x0089 [1] TMOD 0x0089 [0] M10_bit 0x0089 [0] GATE0_bit 0x0089 [0] C_T0_bit 0x008A [1] TL0 0x008B [1] TL1 0x008C [1] TH0 0x008D [1] TH1 0x008E [0] DISRTO_bit 0x008E [0] WDIDLE_bit 0x008E [0] EXTRAM_bit 0x008E [1] AUXR 0x008E [0] DISALE_bit 0x0090 [0] P1_1_bit 0x0090 [0] P1_2_bit 0x0090 [1] P1 0x0090 [0] P1_0_bit 0x0090 [0] P1_3_bit 0x0090 [0] P1_6_bit 0x0090 [0] P1_7_bit 0x0090 [0] P1_4_bit 0x0090 [0] P1_5_bit 0x0098 [0] REN_bit 0x0098 [0] TB8_bit 0x0098 [0] RB8_bit 0x0098 [0] SM1_bit 0x0098 [0] SM0_bit 0x0098 [0] SM2_bit 0x0098 [0] RI_bit 0x0098 [1] SCON 0x0098 [0] TI_bit 0x0099 [1] SBUF 0x00A0 [0] P2_2_bit 0x00A0 [0] P2_3_bit 0x00A0 [1] P2 0x00A0 [0] P2_0_bit 0x00A0 [0] P2_1_bit 0x00A0 [0] P2_7_bit 0x00A0 [0] P2_6_bit 0x00A0 [0] P2_4_bit 0x00A0 [0] P2_5_bit 0x00A2 [0] DPS_bit 0x00A2 [1] AUXR1 0x00A6 [1] WDTRST 0x00A8 [0] ET0_bit 0x00A8 [0] ET1_bit 0x00A8 [1] IE 0x00A8 [0] EX1_bit 0x00A8 [0] EX0_bit 0x00A8 [0] EA_bit 0x00A8 [0] ES_bit 0x00B0 [0] P3_1_bit 0x00B0 [1] P3 0x00B0 [0] P3_0_bit 0x00B0 [0] P3_5_bit 0x00B0 [0] P3_6_bit 0x00B0 [0] P3_7_bit 0x00B0 [0] P3_2_bit 0x00B0 [0] P3_3_bit 0x00B0 [0] P3_4_bit 0x00B8 [0] PT0_bit 0x00B8 [0] PX0_bit 0x00B8 [1] IP 0x00B8 [0] PS_bit 0x00B8 [0] PT1_bit 0x00B8 [0] PX1_bit 0x00D0 [0] RS1_bit 0x00D0 [0] RS0_bit 0x00D0 [0] F0_bit 0x00D0 [0] CY_bit 0x00D0 [0] AC_bit 0x00D0 [0] OV_bit 0x00D0 [1] PSW 0x00D0 [0] P_bit 0x00D0 [0] F1_bit 0x00E0 [1] ACC 0x00F0 [1] B //** Constants locations ** //ADDRESS SIZE CONSTANT //---------------------------------------------- 0x00A9 [10] ?ICS_ca_mask 0x00B3 [1] ?ICS_counter //** Label List: ** //---------------------------------------------- L_main0 L_main1 L_main2 L_main3 L_main4 L_main5 L_main6 L_main7 L_main8 L_main9 _main _CC2D_Loop1 _CC2PD_Loop1 _CC2XD_Loop1 ___DoIFC ___CC2D ___CC2PD ___CC2XD
while(1) {
tens = counter / 10;
units = counter % 10;
SSD_DATA_PORT_UNITS = ca_mask[units];
SSD_DATA_PORT_TENS = ca_mask[tens];
if(!P1_0_bit) {
Delay_ms(50);
while(!P1_0_bit);
if(counter < 99)++counter;
}
if(!P1_1_bit) {
Delay_ms(50);
while(!P1_1_bit);
if(counter > 0)--counter;
}
}
}
What do you mean by rounding up ? You mean after 99 if increment is pressed it should become 0 ?
if(counter < 99)++counter;
if(counter > 0)--counter;
I belive you are right, just my ignorance. Reviewing the first post, the code is missing keypress (edge) detection. This is accomplished by a combination of debounce, as with delay_ms(50), and a compare of present and previous state.I think his requirement is if button is pressed it should increment from 0 to 99 and stop and if button 2 is pressed it should reset and become 0.
if (present_state & KEY_XX && !(previos_state & KEY_XX))
count++
previous_state = present_state;
Code C - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 char counter = 0, units, tens; char ca_mask[] = {0xC0, 0xF9, 0xA4, 0xB0, 0x99, 0x92, 0x82, 0xF8, 0x80, 0x90}; #define SSD_DATA_PORT_UNITS P3 #define SSD_DATA_PORT_TENS P2 void main() { P0 = 0x00; P1 = 0x03; P2 = 0x00; P3 = 0x00; Delay_ms(1000); P2 = 0xFF; while(1) { tens = counter / 10; units = counter % 10; SSD_DATA_PORT_UNITS = ca_mask[units]; SSD_DATA_PORT_TENS = ca_mask[tens]; if(!P1_0_bit) { Delay_ms(50); while(!P1_0_bit); if(counter < 99)++counter; } if(!P1_1_bit) { Delay_ms(50); while(!P1_1_bit); counter = 0; } } }
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 _main: MOV SP+0, #128 ;ssd.c,7 :: void main() { ;ssd.c,9 :: P0 = 0x00; MOV P0+0, #0 ;ssd.c,10 :: P1 = 0x03; MOV P1+0, #3 ;ssd.c,11 :: P2 = 0x00; MOV P2+0, #0 ;ssd.c,12 :: P3 = 0x00; MOV P3+0, #0 ;ssd.c,14 :: Delay_ms(1000); MOV R5, 8 MOV R6, 1 MOV R7, 245 DJNZ R7, DJNZ R6, DJNZ R5, NOP ;ssd.c,15 :: P2 = 0xFF; MOV P2+0, #255 ;ssd.c,17 :: while(1) { L_main0: ;ssd.c,19 :: tens = counter / 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV R0, A MOV _tens+0, 0 ;ssd.c,20 :: units = counter % 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV A, B+0 MOV R0, A MOV _units+0, 0 ;ssd.c,22 :: SSD_DATA_PORT_UNITS = ca_mask[units]; MOV A, #_ca_mask+0 ADD A, R0 MOV R0, A MOV P3+0, @R0 ;ssd.c,23 :: SSD_DATA_PORT_TENS = ca_mask[tens]; MOV A, #_ca_mask+0 ADD A, _tens+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,25 :: if(!P1_0_bit) { JB P1_0_bit+0, L_main2 NOP ;ssd.c,26 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,27 :: while(!P1_0_bit); L_main3: JB P1_0_bit+0, L_main4 NOP SJMP L_main3 L_main4: ;ssd.c,28 :: if(counter < 99)++counter; CLR C MOV A, _counter+0 SUBB A, #99 JNC L_main5 INC _counter+0 L_main5: ;ssd.c,29 :: } L_main2: ;ssd.c,31 :: if(!P1_1_bit) { JB P1_1_bit+0, L_main6 NOP ;ssd.c,32 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,33 :: while(!P1_1_bit); L_main7: JB P1_1_bit+0, L_main8 NOP SJMP L_main7 L_main8: ;ssd.c,34 :: counter = 0; MOV _counter+0, #0 ;ssd.c,35 :: } L_main6: ;ssd.c,36 :: } SJMP L_main0 ;ssd.c,37 :: } SJMP #254 ; end of _main
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 ; LST file generated by mikroListExporter - v.2.0 ; Date/Time: 2/25/2015 10:37:22 PM ;---------------------------------------------- ;Address Opcode ASM 0x0000 0x02002E LJMP 46 0x0003 0x020000 LJMP 0 0x0006 0x00 NOP 0x0007 0x00 NOP 0x0008 0x00 NOP 0x0009 0x00 NOP 0x000A 0x00 NOP 0x000B 0x020000 LJMP 0 0x000E 0x00 NOP 0x000F 0x00 NOP 0x0010 0x00 NOP 0x0011 0x00 NOP 0x0012 0x00 NOP 0x0013 0x020000 LJMP 0 0x0016 0x00 NOP 0x0017 0x00 NOP 0x0018 0x00 NOP 0x0019 0x00 NOP 0x001A 0x00 NOP 0x001B 0x020000 LJMP 0 0x001E 0x00 NOP 0x001F 0x00 NOP 0x0020 0x00 NOP 0x0021 0x00 NOP 0x0022 0x00 NOP 0x0023 0x020000 LJMP 0 ___CC2D: ;__Lib_System.c,13 :: ;__Lib_System.c,15 :: _CC2D_Loop1: ;__Lib_System.c,16 :: 0x0026 0xE4 CLR A ;__Lib_System.c,17 :: 0x0027 0x93 MOVC A, @A+DPTR ;__Lib_System.c,18 :: 0x0028 0xF6 MOV @R0, A ;__Lib_System.c,19 :: 0x0029 0x08 INC R0 ;__Lib_System.c,20 :: 0x002A 0xA3 INC DPTR ;__Lib_System.c,21 :: 0x002B 0xD9F9 DJNZ R1, _CC2D_Loop1 ;__Lib_System.c,23 :: 0x002D 0x22 RET ; end of ___CC2D _main: 0x002E 0x75813B MOV SP, #59 0x0031 0x1200AE LCALL 174 ;ssd.c,7 :: void main() { ;ssd.c,9 :: P0 = 0x00; 0x0034 0x758000 MOV P0, #0 ;ssd.c,10 :: P1 = 0x03; 0x0037 0x759003 MOV P1, #3 ;ssd.c,11 :: P2 = 0x00; 0x003A 0x75A000 MOV P2, #0 ;ssd.c,12 :: P3 = 0x00; 0x003D 0x75B000 MOV P3, #0 ;ssd.c,14 :: Delay_ms(1000); 0x0040 0x7D08 MOV R5, 8 0x0042 0x7E01 MOV R6, 1 0x0044 0x7FF5 MOV R7, 245 0x0046 0xDFFE DJNZ R7, PC-2 0x0048 0xDEFC DJNZ R6, PC-4 0x004A 0xDDFA DJNZ R5, PC-6 0x004C 0x00 NOP ;ssd.c,15 :: P2 = 0xFF; 0x004D 0x75A0FF MOV P2, #255 ;ssd.c,17 :: while(1) { L_main0: ;ssd.c,19 :: tens = counter / 10; 0x0050 0x75F00A MOV B, #10 0x0053 0xE53A MOV A, _counter 0x0055 0x84 DIV AB 0x0056 0xF8 MOV R0, A 0x0057 0x850009 MOV _tens, 0 ;ssd.c,20 :: units = counter % 10; 0x005A 0x75F00A MOV B, #10 0x005D 0xE53A MOV A, _counter 0x005F 0x84 DIV AB 0x0060 0xE5F0 MOV A, B 0x0062 0xF8 MOV R0, A 0x0063 0x850008 MOV _units, 0 ;ssd.c,22 :: SSD_DATA_PORT_UNITS = ca_mask[units]; 0x0066 0x7430 MOV A, lo_addr(_ca_mask) 0x0068 0x28 ADD A, R0 0x0069 0xF8 MOV R0, A 0x006A 0x86B0 MOV P3, @R0 ;ssd.c,23 :: SSD_DATA_PORT_TENS = ca_mask[tens]; 0x006C 0x7430 MOV A, lo_addr(_ca_mask) 0x006E 0x2509 ADD A, _tens 0x0070 0xF8 MOV R0, A 0x0071 0x86A0 MOV P2, @R0 ;ssd.c,25 :: if(!P1_0_bit) { 0x0073 0x209016 JB P1_0_bit, L_main2 ;ssd.c,26 :: Delay_ms(50); 0x0076 0x7E5A MOV R6, 90 0x0078 0x7FA5 MOV R7, 165 0x007A 0xDFFE DJNZ R7, PC-2 0x007C 0xDEFC DJNZ R6, PC-4 ;ssd.c,27 :: while(!P1_0_bit); L_main3: 0x007E 0x209002 JB P1_0_bit, L_main4 0x0081 0x80FB SJMP L_main3 L_main4: ;ssd.c,28 :: if(counter < 99)++counter; 0x0083 0xC3 CLR C 0x0084 0xE53A MOV A, _counter 0x0086 0x9463 SUBB A, #99 0x0088 0x5002 JNC L_main5 0x008A 0x053A INC _counter L_main5: ;ssd.c,29 :: } L_main2: ;ssd.c,31 :: if(!P1_1_bit) { 0x008C 0x209110 JB P1_1_bit, L_main6 ;ssd.c,32 :: Delay_ms(50); 0x008F 0x7E5A MOV R6, 90 0x0091 0x7FA5 MOV R7, 165 0x0093 0xDFFE DJNZ R7, PC-2 0x0095 0xDEFC DJNZ R6, PC-4 ;ssd.c,33 :: while(!P1_1_bit); L_main7: 0x0097 0x209102 JB P1_1_bit, L_main8 0x009A 0x80FB SJMP L_main7 L_main8: ;ssd.c,34 :: counter = 0; 0x009C 0x753A00 MOV _counter, #0 ;ssd.c,35 :: } L_main6: ;ssd.c,36 :: } 0x009F 0x80AF SJMP L_main0 ;ssd.c,37 :: } 0x00A1 0x80FE SJMP #254 ; end of _main 0x00AE 0x7830 MOV R0, 48 0x00B0 0x790B MOV R1, 11 0x00B2 0x7582A3 MOV DPL, 163 0x00B5 0x758300 MOV DPH, 0 0x00B8 0x120026 LCALL 38 0x00BB 0x22 RET ;ssd.c,0 :: ?ICS_ca_mask 0x00A3 0xC0F9A4 ;?ICS_ca_mask+0 0x00A6 0xB09992 ;?ICS_ca_mask+3 0x00A9 0x82F880 ;?ICS_ca_mask+6 0x00AC 0x90 ;?ICS_ca_mask+9 ; end of ?ICS_ca_mask ;ssd.c,0 :: ?ICS_counter 0x00AD 0x00 ;?ICS_counter+0 ; end of ?ICS_counter Symbol List: //** Routines locations ** //ADDRESS SIZE PROCEDURE //---------------------------------------------- 0x0026 [8] ___CC2D 0x002E [117] _main //** Variables locations ** //ADDRESS SIZE VARIABLE //---------------------------------------------- 0x0000 [1] R0 0x0001 [1] R1 0x0002 [1] R2 0x0003 [1] R3 0x0004 [1] R4 0x0005 [1] R5 0x0006 [1] R6 0x0007 [1] R7 0x0008 [1] _units 0x0009 [1] _tens 0x0030 [10] _ca_mask 0x003A [1] _counter 0x0080 [1] P0 0x0080 [0] P0_6_bit 0x0080 [0] P0_5_bit 0x0080 [0] P0_0_bit 0x0080 [0] P0_1_bit 0x0080 [0] P0_2_bit 0x0080 [0] P0_3_bit 0x0080 [0] P0_4_bit 0x0080 [0] P0_7_bit 0x0081 [1] SP 0x0082 [1] DPL 0x0082 [2] DPTR 0x0082 [1] DP0L 0x0083 [1] DPH 0x0083 [1] DP0H 0x0084 [1] DP1L 0x0085 [1] DP1H 0x0087 [0] SMOD_bit 0x0087 [0] GF1_bit 0x0087 [1] PCON 0x0087 [0] PD_bit 0x0087 [0] IDL_bit 0x0087 [0] GF0_bit 0x0088 [0] IT1_bit 0x0088 [0] TF1_bit 0x0088 [0] TR0_bit 0x0088 [0] IE1_bit 0x0088 [0] TF0_bit 0x0088 [0] TR1_bit 0x0088 [1] TCON 0x0088 [0] IT0_bit 0x0088 [0] IE0_bit 0x0089 [0] M11_bit 0x0089 [0] C_T1_bit 0x0089 [0] GATE1_bit 0x0089 [0] M01_bit 0x0089 [0] M00_bit 0x0089 [1] TMOD 0x0089 [0] M10_bit 0x0089 [0] GATE0_bit 0x0089 [0] C_T0_bit 0x008A [1] TL0 0x008B [1] TL1 0x008C [1] TH0 0x008D [1] TH1 0x008E [0] DISRTO_bit 0x008E [0] WDIDLE_bit 0x008E [0] EXTRAM_bit 0x008E [1] AUXR 0x008E [0] DISALE_bit 0x0090 [0] P1_1_bit 0x0090 [0] P1_2_bit 0x0090 [1] P1 0x0090 [0] P1_0_bit 0x0090 [0] P1_3_bit 0x0090 [0] P1_6_bit 0x0090 [0] P1_7_bit 0x0090 [0] P1_4_bit 0x0090 [0] P1_5_bit 0x0098 [0] REN_bit 0x0098 [0] TB8_bit 0x0098 [0] RB8_bit 0x0098 [0] SM1_bit 0x0098 [0] SM0_bit 0x0098 [0] SM2_bit 0x0098 [0] RI_bit 0x0098 [1] SCON 0x0098 [0] TI_bit 0x0099 [1] SBUF 0x00A0 [0] P2_3_bit 0x00A0 [0] P2_4_bit 0x00A0 [0] P2_1_bit 0x00A0 [0] P2_2_bit 0x00A0 [0] P2_0_bit 0x00A0 [1] P2 0x00A0 [0] P2_7_bit 0x00A0 [0] P2_5_bit 0x00A0 [0] P2_6_bit 0x00A2 [1] AUXR1 0x00A2 [0] DPS_bit 0x00A6 [1] WDTRST 0x00A8 [0] EX1_bit 0x00A8 [1] IE 0x00A8 [0] ET0_bit 0x00A8 [0] ET1_bit 0x00A8 [0] EX0_bit 0x00A8 [0] EA_bit 0x00A8 [0] ES_bit 0x00B0 [0] P3_0_bit 0x00B0 [1] P3 0x00B0 [0] P3_1_bit 0x00B0 [0] P3_5_bit 0x00B0 [0] P3_6_bit 0x00B0 [0] P3_7_bit 0x00B0 [0] P3_2_bit 0x00B0 [0] P3_3_bit 0x00B0 [0] P3_4_bit 0x00B8 [0] PT0_bit 0x00B8 [0] PX0_bit 0x00B8 [1] IP 0x00B8 [0] PS_bit 0x00B8 [0] PT1_bit 0x00B8 [0] PX1_bit 0x00D0 [0] RS1_bit 0x00D0 [0] RS0_bit 0x00D0 [0] F0_bit 0x00D0 [0] CY_bit 0x00D0 [0] AC_bit 0x00D0 [0] OV_bit 0x00D0 [1] PSW 0x00D0 [0] P_bit 0x00D0 [0] F1_bit 0x00E0 [1] ACC 0x00F0 [1] B //** Constants locations ** //ADDRESS SIZE CONSTANT //---------------------------------------------- 0x00A3 [10] ?ICS_ca_mask 0x00AD [1] ?ICS_counter //** Label List: ** //---------------------------------------------- L_main0 L_main1 L_main2 L_main3 L_main4 L_main5 L_main6 L_main7 L_main8 _main _CC2D_Loop1 _CC2PD_Loop1 _CC2XD_Loop1 ___DoIFC ___CC2D ___CC2PD ___CC2XD
I think his requirement is if button is pressed it should increment from 0 to 99 and stop and if button 2 is pressed it should reset and become 0.
@Nik Zhafran
What is your exact requirement.
i had not tested this code.Code:Org 00H data_one equ P3 data_ten equ P2 IPIN EQU P1.0 DPIN EQU P1.1 Mynumber Equ 30H main_prog: CALL INIT AGAIN: AG2: JB IPIN,AG1 CALL DELAY1 ;debounce JB IPIN,AG1 JNB IPIN,$ ;wait till switch release INC MYNUMBER mov a,mynumber cjne a,#100,pq1 mov mynumber,#0 pq1: call bcd ;diaplay data AG1: JB DPIN,AG2 CALL DELAY1 JB DPIN,AG2 JNB DPIN,$ dec mynumber mov a,mynumber cjne a,#255,pq2 mov mynumber,#99 pq2: call bcd JMP AGAIN INIT: MOV data_ten,#0C0H MOV data_one,#0c0H mov Mynumber,#0 mov p1,#255 ;set port 1 as input BY . IT SHOULD BE 1 RET DELAY1: MOV R4,#255 DJNZ R4,$ RET BCD: Mov A,Mynumber Mov B,#10 Div AB movc dptr,#seg_conv MOVC A,@A+DPTR ; MOVE DATA @A+DPTR IN A mov data_ten, A mov A,B movc dptr,#seg_conv MOVC A,@A+DPTR ; MOVE DATA @A+DPTR IN A mov data_one, A Ret delay: MOV R5,#0ffh MOV R6,#0ffH MOV R7,#2 delay_loop: DJNZ R5,delay_loop DJNZ R6,delay_loop DJNZ R7,delay_loop RET Seg_conv: DB 0C0H ; 0 DB 0F9H ; 1 DB 0A4H ; 2 DB 0B0H ; 3 DB 099H ; 4 DB 092H ; 5 DB 082H ; 6 DB 0F8H ; 7 DB 080H ; 8 DB 090H ; 9 END
Code as per requirement in post #1.
C Code
Code C - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 char counter = 0, units, tens; char ca_mask[] = {0xC0, 0xF9, 0xA4, 0xB0, 0x99, 0x92, 0x82, 0xF8, 0x80, 0x90}; #define SSD_DATA_PORT_UNITS P3 #define SSD_DATA_PORT_TENS P2 void main() { P0 = 0x00; P1 = 0x03; P2 = 0x00; P3 = 0x00; Delay_ms(1000); P2 = 0xFF; while(1) { tens = counter / 10; units = counter % 10; SSD_DATA_PORT_UNITS = ca_mask[units]; SSD_DATA_PORT_TENS = ca_mask[tens]; if(!P1_0_bit) { Delay_ms(50); while(!P1_0_bit); if(counter < 99)++counter; } if(!P1_1_bit) { Delay_ms(50); while(!P1_1_bit); counter = 0; } } }
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 _main: MOV SP+0, #128 ;ssd.c,7 :: void main() { ;ssd.c,9 :: P0 = 0x00; MOV P0+0, #0 ;ssd.c,10 :: P1 = 0x03; MOV P1+0, #3 ;ssd.c,11 :: P2 = 0x00; MOV P2+0, #0 ;ssd.c,12 :: P3 = 0x00; MOV P3+0, #0 ;ssd.c,14 :: Delay_ms(1000); MOV R5, 8 MOV R6, 1 MOV R7, 245 DJNZ R7, DJNZ R6, DJNZ R5, NOP ;ssd.c,15 :: P2 = 0xFF; MOV P2+0, #255 ;ssd.c,17 :: while(1) { L_main0: ;ssd.c,19 :: tens = counter / 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV R0, A MOV _tens+0, 0 ;ssd.c,20 :: units = counter % 10; MOV B+0, #10 MOV A, _counter+0 DIV AB MOV A, B+0 MOV R0, A MOV _units+0, 0 ;ssd.c,22 :: SSD_DATA_PORT_UNITS = ca_mask[units]; MOV A, #_ca_mask+0 ADD A, R0 MOV R0, A MOV P3+0, @R0 ;ssd.c,23 :: SSD_DATA_PORT_TENS = ca_mask[tens]; MOV A, #_ca_mask+0 ADD A, _tens+0 MOV R0, A MOV P2+0, @R0 ;ssd.c,25 :: if(!P1_0_bit) { JB P1_0_bit+0, L_main2 NOP ;ssd.c,26 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,27 :: while(!P1_0_bit); L_main3: JB P1_0_bit+0, L_main4 NOP SJMP L_main3 L_main4: ;ssd.c,28 :: if(counter < 99)++counter; CLR C MOV A, _counter+0 SUBB A, #99 JNC L_main5 INC _counter+0 L_main5: ;ssd.c,29 :: } L_main2: ;ssd.c,31 :: if(!P1_1_bit) { JB P1_1_bit+0, L_main6 NOP ;ssd.c,32 :: Delay_ms(50); MOV R6, 90 MOV R7, 165 DJNZ R7, DJNZ R6, ;ssd.c,33 :: while(!P1_1_bit); L_main7: JB P1_1_bit+0, L_main8 NOP SJMP L_main7 L_main8: ;ssd.c,34 :: counter = 0; MOV _counter+0, #0 ;ssd.c,35 :: } L_main6: ;ssd.c,36 :: } SJMP L_main0 ;ssd.c,37 :: } SJMP #254 ; end of _main
List file
Code ASM - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 ; LST file generated by mikroListExporter - v.2.0 ; Date/Time: 2/25/2015 10:37:22 PM ;---------------------------------------------- ;Address Opcode ASM 0x0000 0x02002E LJMP 46 0x0003 0x020000 LJMP 0 0x0006 0x00 NOP 0x0007 0x00 NOP 0x0008 0x00 NOP 0x0009 0x00 NOP 0x000A 0x00 NOP 0x000B 0x020000 LJMP 0 0x000E 0x00 NOP 0x000F 0x00 NOP 0x0010 0x00 NOP 0x0011 0x00 NOP 0x0012 0x00 NOP 0x0013 0x020000 LJMP 0 0x0016 0x00 NOP 0x0017 0x00 NOP 0x0018 0x00 NOP 0x0019 0x00 NOP 0x001A 0x00 NOP 0x001B 0x020000 LJMP 0 0x001E 0x00 NOP 0x001F 0x00 NOP 0x0020 0x00 NOP 0x0021 0x00 NOP 0x0022 0x00 NOP 0x0023 0x020000 LJMP 0 ___CC2D: ;__Lib_System.c,13 :: ;__Lib_System.c,15 :: _CC2D_Loop1: ;__Lib_System.c,16 :: 0x0026 0xE4 CLR A ;__Lib_System.c,17 :: 0x0027 0x93 MOVC A, @A+DPTR ;__Lib_System.c,18 :: 0x0028 0xF6 MOV @R0, A ;__Lib_System.c,19 :: 0x0029 0x08 INC R0 ;__Lib_System.c,20 :: 0x002A 0xA3 INC DPTR ;__Lib_System.c,21 :: 0x002B 0xD9F9 DJNZ R1, _CC2D_Loop1 ;__Lib_System.c,23 :: 0x002D 0x22 RET ; end of ___CC2D _main: 0x002E 0x75813B MOV SP, #59 0x0031 0x1200AE LCALL 174 ;ssd.c,7 :: void main() { ;ssd.c,9 :: P0 = 0x00; 0x0034 0x758000 MOV P0, #0 ;ssd.c,10 :: P1 = 0x03; 0x0037 0x759003 MOV P1, #3 ;ssd.c,11 :: P2 = 0x00; 0x003A 0x75A000 MOV P2, #0 ;ssd.c,12 :: P3 = 0x00; 0x003D 0x75B000 MOV P3, #0 ;ssd.c,14 :: Delay_ms(1000); 0x0040 0x7D08 MOV R5, 8 0x0042 0x7E01 MOV R6, 1 0x0044 0x7FF5 MOV R7, 245 0x0046 0xDFFE DJNZ R7, PC-2 0x0048 0xDEFC DJNZ R6, PC-4 0x004A 0xDDFA DJNZ R5, PC-6 0x004C 0x00 NOP ;ssd.c,15 :: P2 = 0xFF; 0x004D 0x75A0FF MOV P2, #255 ;ssd.c,17 :: while(1) { L_main0: ;ssd.c,19 :: tens = counter / 10; 0x0050 0x75F00A MOV B, #10 0x0053 0xE53A MOV A, _counter 0x0055 0x84 DIV AB 0x0056 0xF8 MOV R0, A 0x0057 0x850009 MOV _tens, 0 ;ssd.c,20 :: units = counter % 10; 0x005A 0x75F00A MOV B, #10 0x005D 0xE53A MOV A, _counter 0x005F 0x84 DIV AB 0x0060 0xE5F0 MOV A, B 0x0062 0xF8 MOV R0, A 0x0063 0x850008 MOV _units, 0 ;ssd.c,22 :: SSD_DATA_PORT_UNITS = ca_mask[units]; 0x0066 0x7430 MOV A, lo_addr(_ca_mask) 0x0068 0x28 ADD A, R0 0x0069 0xF8 MOV R0, A 0x006A 0x86B0 MOV P3, @R0 ;ssd.c,23 :: SSD_DATA_PORT_TENS = ca_mask[tens]; 0x006C 0x7430 MOV A, lo_addr(_ca_mask) 0x006E 0x2509 ADD A, _tens 0x0070 0xF8 MOV R0, A 0x0071 0x86A0 MOV P2, @R0 ;ssd.c,25 :: if(!P1_0_bit) { 0x0073 0x209016 JB P1_0_bit, L_main2 ;ssd.c,26 :: Delay_ms(50); 0x0076 0x7E5A MOV R6, 90 0x0078 0x7FA5 MOV R7, 165 0x007A 0xDFFE DJNZ R7, PC-2 0x007C 0xDEFC DJNZ R6, PC-4 ;ssd.c,27 :: while(!P1_0_bit); L_main3: 0x007E 0x209002 JB P1_0_bit, L_main4 0x0081 0x80FB SJMP L_main3 L_main4: ;ssd.c,28 :: if(counter < 99)++counter; 0x0083 0xC3 CLR C 0x0084 0xE53A MOV A, _counter 0x0086 0x9463 SUBB A, #99 0x0088 0x5002 JNC L_main5 0x008A 0x053A INC _counter L_main5: ;ssd.c,29 :: } L_main2: ;ssd.c,31 :: if(!P1_1_bit) { 0x008C 0x209110 JB P1_1_bit, L_main6 ;ssd.c,32 :: Delay_ms(50); 0x008F 0x7E5A MOV R6, 90 0x0091 0x7FA5 MOV R7, 165 0x0093 0xDFFE DJNZ R7, PC-2 0x0095 0xDEFC DJNZ R6, PC-4 ;ssd.c,33 :: while(!P1_1_bit); L_main7: 0x0097 0x209102 JB P1_1_bit, L_main8 0x009A 0x80FB SJMP L_main7 L_main8: ;ssd.c,34 :: counter = 0; 0x009C 0x753A00 MOV _counter, #0 ;ssd.c,35 :: } L_main6: ;ssd.c,36 :: } 0x009F 0x80AF SJMP L_main0 ;ssd.c,37 :: } 0x00A1 0x80FE SJMP #254 ; end of _main 0x00AE 0x7830 MOV R0, 48 0x00B0 0x790B MOV R1, 11 0x00B2 0x7582A3 MOV DPL, 163 0x00B5 0x758300 MOV DPH, 0 0x00B8 0x120026 LCALL 38 0x00BB 0x22 RET ;ssd.c,0 :: ?ICS_ca_mask 0x00A3 0xC0F9A4 ;?ICS_ca_mask+0 0x00A6 0xB09992 ;?ICS_ca_mask+3 0x00A9 0x82F880 ;?ICS_ca_mask+6 0x00AC 0x90 ;?ICS_ca_mask+9 ; end of ?ICS_ca_mask ;ssd.c,0 :: ?ICS_counter 0x00AD 0x00 ;?ICS_counter+0 ; end of ?ICS_counter Symbol List: //** Routines locations ** //ADDRESS SIZE PROCEDURE //---------------------------------------------- 0x0026 [8] ___CC2D 0x002E [117] _main //** Variables locations ** //ADDRESS SIZE VARIABLE //---------------------------------------------- 0x0000 [1] R0 0x0001 [1] R1 0x0002 [1] R2 0x0003 [1] R3 0x0004 [1] R4 0x0005 [1] R5 0x0006 [1] R6 0x0007 [1] R7 0x0008 [1] _units 0x0009 [1] _tens 0x0030 [10] _ca_mask 0x003A [1] _counter 0x0080 [1] P0 0x0080 [0] P0_6_bit 0x0080 [0] P0_5_bit 0x0080 [0] P0_0_bit 0x0080 [0] P0_1_bit 0x0080 [0] P0_2_bit 0x0080 [0] P0_3_bit 0x0080 [0] P0_4_bit 0x0080 [0] P0_7_bit 0x0081 [1] SP 0x0082 [1] DPL 0x0082 [2] DPTR 0x0082 [1] DP0L 0x0083 [1] DPH 0x0083 [1] DP0H 0x0084 [1] DP1L 0x0085 [1] DP1H 0x0087 [0] SMOD_bit 0x0087 [0] GF1_bit 0x0087 [1] PCON 0x0087 [0] PD_bit 0x0087 [0] IDL_bit 0x0087 [0] GF0_bit 0x0088 [0] IT1_bit 0x0088 [0] TF1_bit 0x0088 [0] TR0_bit 0x0088 [0] IE1_bit 0x0088 [0] TF0_bit 0x0088 [0] TR1_bit 0x0088 [1] TCON 0x0088 [0] IT0_bit 0x0088 [0] IE0_bit 0x0089 [0] M11_bit 0x0089 [0] C_T1_bit 0x0089 [0] GATE1_bit 0x0089 [0] M01_bit 0x0089 [0] M00_bit 0x0089 [1] TMOD 0x0089 [0] M10_bit 0x0089 [0] GATE0_bit 0x0089 [0] C_T0_bit 0x008A [1] TL0 0x008B [1] TL1 0x008C [1] TH0 0x008D [1] TH1 0x008E [0] DISRTO_bit 0x008E [0] WDIDLE_bit 0x008E [0] EXTRAM_bit 0x008E [1] AUXR 0x008E [0] DISALE_bit 0x0090 [0] P1_1_bit 0x0090 [0] P1_2_bit 0x0090 [1] P1 0x0090 [0] P1_0_bit 0x0090 [0] P1_3_bit 0x0090 [0] P1_6_bit 0x0090 [0] P1_7_bit 0x0090 [0] P1_4_bit 0x0090 [0] P1_5_bit 0x0098 [0] REN_bit 0x0098 [0] TB8_bit 0x0098 [0] RB8_bit 0x0098 [0] SM1_bit 0x0098 [0] SM0_bit 0x0098 [0] SM2_bit 0x0098 [0] RI_bit 0x0098 [1] SCON 0x0098 [0] TI_bit 0x0099 [1] SBUF 0x00A0 [0] P2_3_bit 0x00A0 [0] P2_4_bit 0x00A0 [0] P2_1_bit 0x00A0 [0] P2_2_bit 0x00A0 [0] P2_0_bit 0x00A0 [1] P2 0x00A0 [0] P2_7_bit 0x00A0 [0] P2_5_bit 0x00A0 [0] P2_6_bit 0x00A2 [1] AUXR1 0x00A2 [0] DPS_bit 0x00A6 [1] WDTRST 0x00A8 [0] EX1_bit 0x00A8 [1] IE 0x00A8 [0] ET0_bit 0x00A8 [0] ET1_bit 0x00A8 [0] EX0_bit 0x00A8 [0] EA_bit 0x00A8 [0] ES_bit 0x00B0 [0] P3_0_bit 0x00B0 [1] P3 0x00B0 [0] P3_1_bit 0x00B0 [0] P3_5_bit 0x00B0 [0] P3_6_bit 0x00B0 [0] P3_7_bit 0x00B0 [0] P3_2_bit 0x00B0 [0] P3_3_bit 0x00B0 [0] P3_4_bit 0x00B8 [0] PT0_bit 0x00B8 [0] PX0_bit 0x00B8 [1] IP 0x00B8 [0] PS_bit 0x00B8 [0] PT1_bit 0x00B8 [0] PX1_bit 0x00D0 [0] RS1_bit 0x00D0 [0] RS0_bit 0x00D0 [0] F0_bit 0x00D0 [0] CY_bit 0x00D0 [0] AC_bit 0x00D0 [0] OV_bit 0x00D0 [1] PSW 0x00D0 [0] P_bit 0x00D0 [0] F1_bit 0x00E0 [1] ACC 0x00F0 [1] B //** Constants locations ** //ADDRESS SIZE CONSTANT //---------------------------------------------- 0x00A3 [10] ?ICS_ca_mask 0x00AD [1] ?ICS_counter //** Label List: ** //---------------------------------------------- L_main0 L_main1 L_main2 L_main3 L_main4 L_main5 L_main6 L_main7 L_main8 _main _CC2D_Loop1 _CC2PD_Loop1 _CC2XD_Loop1 ___DoIFC ___CC2D ___CC2PD ___CC2XD
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