Given a new process, what do Analog IC designer do before they start using the process for actual design? I am talking about what sort of simulation is typically done beforehand so that a good model is obtained in order to get a good approximation when sizing the transistors? Is Id/W vs. Vgs-Vt plot for different lengths a good model or the good old square law still used?
Warning. Almost all your posts are few words long and useless. Stop hunting points. Give links, give real help, not answers like "try on google".
/pisoiu
First, you should check model accuracy by comparing
simulation results with measuring data from foudry;then you can easily get level 1 parameters,from id-vd,or gm-id curves .
You can adopt BSIM3 version 2 or MOS Model 9, however both are accurate to HCMOS 11 only.
You can extract suggested parameters from EDA CAD. Many Digital IC Designer do that.
However Analog IC Designer do this in a professional way by actually model the MOS device which is used in the circuit, then simulate the (I-V) transconductance characteristic curves umpteen times until the result is satisfactory. The eventual parameters are extracted and used.