Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi ,
the frequency of oscillation depends on the Threshold voltage of the NOT gates,
for high frequency you must use 'HCT' and 'F' gates ( 74f04)
the circuit works so easily :
1- assume that Vx=1 therefore Vz=Vy=0
because Vz < Vth => C capacitor charging until the Vz voltage reaches Vth of NOT gate,
( Vth = Vz )
2- when Vz= Vth => It changes the state and Vx = 0 , Vy=Vz =1
therefore c is decharging until Vz <Vth_low => Vx=1
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.