How to layout patterned ground shield for on-chip inductor?

[maolh]

patterned ground shield

Hi, all,

Could you tell me how to layout patterned ground shield for on-chip inductor using virtuoso? Or are there any tools can do this job? Any suggestion wil be appreciated.

Thanks in advance.

 

[nathan]

inductor patterned ground

Unfortunately, no tool is available to laid it out automatically. Either you do it by hand or write a complex skill procedure.

nathan

 

[ptoo30]

layout patterned ground shield

i also think there is no automatic deign tool for ground shield.
important item is to reduce the eddy current loss, for its simulation i use ADS or ASITICpensource aplying 3d electromagnetic characteristics to obtain "Q" of inductor \\ADS is nly 2 and half dimension and is not 3D
HFSS is good tool to simulate it but it takes huge hours for finishing simulation.

 

[CDRCDR]

inductor ground shield

for the PGS,you could just layout part of that,and then make some copy/paste in virtuoso.The poly should not form a loop

 

[mylihua]

onchip inductor layout

The poly should not form a loop , why?

Thanks in advance....

 

[ilovebow]

on chip inductor patterned ground

how about sonnet

 

[Manjunatha_hv]

sonnet ground shield

Hello,

Yes, Sonnet is good for such simulations & even you can get the desired Q
Also it works with the Spiral Assitant tool to synthesize spiral on chip inductors
& it interfaces to Virtuoso...
see some of the links

**broken link removed**

**broken link removed**

---manju---