how to increase the overdrive voltage

[bharathr87]

overdrive voltage 0.1

I need high values of overdrive voltage, 0.1V<Vgs-Vth<0.15V, for the transistors so as to reduce the effect of mismatch..but for this ckt i am gettin very low values of Vgs-Vth for the nmos and the pmos transistors...increasing the bias current decreases the openloop gain of the first stage(which i want to be >100) and also does not increase Vgs by much...also changing W/L once again decreases the gain... so what should i do to increase the overdrive voltage without decreasing the open loop gain of the first stage?

 

[ieropsaltic]

what is overdrive voltage

When you increase the overdrive voltage by increasing the current, your gain decreases because Rds of the transistors decrease proportionally with I while gm increases proportionally with sqrt(I). To increase Rds once more, you can increase the transistors' channel length which increases Rds once more (but after certain length Rds increase becomes negligible), while increasing W with same value, thus keeping W/L the same. This will result in Veff increase with sqrt(I) without significant loss in gain, also mismatch between transistors' will improve due to area increase (according to Pelgrom's model).

 

[bharathr87]

thank you for the reply ieropsaltic.... i know that if i increase the length, channel length modulation lambda decreases and thus Rds increases...but the problem is I cant increase the length of MN0 and MN3 transistors beyond 0.5u M coz 1u M n all would be too much...so can u think of something else??

 

[ieropsaltic]

Well, one other way would be using cascode, but this comes at the expense of more required headroom and limited swing at the output of the first stage. The swing ,however, shouldn't be a problem if the second stage have sufficient gain.

Another thing that you should node when using cascode is the extra added poles problem. So, you must check your phase margin if you're targeting a closed loop application.