Hi, guys, I am trying to design a cascode lna with gain of 20dB, right now I can reach a gain of 15dB, the current if about 500u and load resistor is about 2k, itis supposed that the circuit should be able to provide a gain of 20 (by calculation), but even I choose larger inductor or wider transistor or higher current, the gain won't increase any more, could you guys give me a hint that where I should look into. BTW, in 65nm process, 1.2V supply
We do not have very much to go on such as the device, frequency range, etc.
There are a couple of thing to check.
1.) make sure you are not putting too much power into the input and causing it to compress
2.) if possible measure the return losses at the input and output ports (with no input signal). You can use a bridge or directional coupler. This will tell you if you have a poor matching network.
3.) make sure the 20dB is a realistic number. Some manufacture's data sheet will show the max gain even though the gain is not obtainable with stability or realizable matches. As example a GaAs FET with a input reflection coefficient of 0.99 may have a high gain at 1 GHz assuming a conjugant match but such a matching network can not be built in the real world.
4.) you may be voltage limited, 1.2V does not leave much "swing" room for a cascode arrangement. Try temporally increasing the voltage and see if the gain improves. Do not exceed Vds or Vce else you will damage the devices.